With the rapid development of nanotechnology, research has been carried out at the molecular level, from atom to atom, to construct new structures with completely new properties. In particular, the field of nanoelectronics is developing very rapidly, and its potential impact involves a very wide range of industries. The current research content of nanoelectronics is mainly on how to develop and utilize carbon nanotubes, semiconductor nanowires, molecular organic electronics and single electron devices.
However, these tiny devices cannot be tested using standard test techniques for a number of reasons. One of the main reasons is the physical size of these devices. The nanometer-scale dimensions of some new "super-CMOS" devices are so small that they are easily damaged by even the small currents used in the measurement process. In addition, traditional DC test techniques do not always reveal how the device is actually working.
Pulsed electrical testing is a measurement technique that reduces the total energy consumption of a device. It avoids possible damage to small nano devices by reducing Joule heating effects such as I2R and V2/R. Pulse testing uses a sufficiently high power supply to apply short-interval pulses to the device under test (DUT) to generate a high-quality, measurable signal, and then removes the signal source.
Through pulse testing, engineers can obtain more device information and more accurately analyze and understand the behavioral characteristics of the device. For example, pulse testing technology can be used to perform transient tests on nanodevices to determine their transfer functions, thereby analyzing the characteristics of the material to be tested. Pulse test measurements are also necessary for devices with constant temperature limits, such as SOI devices, FinFETs, and nanodevices, to avoid self-heating effects and prevent them from masking the response characteristics that researchers are concerned about. Device engineers can also use pulse testing technology to analyze charge trapping effects. Charge trapping effects reduce drain current after the transistor is turned on. As charge is gradually trapped in the gate dielectric, the threshold voltage of the transistor increases due to the increase in the built-in voltage of the gate capacitance; thereby, the drain current is reduced.
There are two different types of pulse testing: voltage pulse and current pulse.
The pulse width produced by the voltage pulse test is much narrower than that of the current pulse test. This property makes the voltage pulse test more suitable for heat transfer experiments, where the time window of interest is only a few hundred nanoseconds. The energy dissipation in the nanodevice can be controlled by the high-precision amplitude and programmable rise and fall times. The voltage pulse test can be used for transient analysis, charge trapping and AC stress testing in reliability testing, and can also be used to generate clock signals to simulate repetitive control lines, such as memory read and write cycles.
Current pulse testing is very similar to voltage pulse testing. In it, a specified current pulse is applied to the DUT and the voltage generated across the device is measured. Current pulse testing is often used to measure lower resistances or obtain the IV characteristic curve of a device without causing the DUT to generate a large amount of energy, avoiding damage or destruction to the nano device.
Both voltage and current pulse testing have many advantages, but their disadvantages are different. For example, the speed characteristics of ultra-short voltage pulses belong to the field of radio frequency (RF), so if the test system is not optimized for high bandwidth, it is easy to cause errors in the measurement process. There are three main sources of error: signal loss due to cables and connectors, loss due to device parasitics, and contact resistance.
The main problem with current pulse testing is the slow rise time, which can be as long as several hundred nanoseconds. This is mainly limited by the inductance and capacitance in the experimental setup.
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Recommended ReadingLatest update time:2024-11-16 15:41
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