Performing PSRR Testing with an Analyzer Without a DC Bias Port

Publisher:BlissfulSunriseLatest update time:2012-07-19 Source: 21ic Keywords:psrr  AD8034 Reading articles on mobile phones Scan QR code
Read articles on your mobile phone anytime, anywhere

PSRR (Power Supply Ripple Rejection Ratio) is one of the most common parameters used to characterize the performance of an operational amplifier (op amp). Some noise sources associated with the amplifier 's power supply pins share energy with the current generated by the amplifier and the noise current generated by the switching circuit. The voltage fluctuation amplitude generated by both energies can generate noise signals at the amplifier's input pins.

Characterizing PSRR over frequency usually involves using an analyzer equipped with a DC bias port, such as Agilent's 8753. For example, to measure negative power supply ripple rejection, the amplifier's -VS is superimposed with a negative 直流电\'); companyAdEvent.show(this,\'companyAdDiv\',[5,18])"> DC voltage through the 8753's bias port and a sine wave through port 1. You can complete the measurement by measuring the amplifier's output at port 2. Unfortunately, the 8753 does not measure frequencies below 30 kHz because of the limited bias voltage inside the analyzer, and most frequency-synchronized power supply rejection graphs start well below 30 kHz.

Another technique would involve using an analyzer that has no DC bias but can reduce the frequency response to 10 Hz or even 1 Hz. The Stanford Research SR785 system is such an analyzer. The SR785 can make measurements better than -120 dB. One way to deal with this problem is to connect the output of the SR785 to a buffer/inverting accumulator like the AD8034.

Figure 1 - Negative Power Supply Ripple Rejection Ratio Test Circuit Configuration. Pin 3 is connected to the SR785 source output. The output power supply of the buffer amplifier (pin 1) is connected to the reference port of the SR785. Here, the first amplifier separates the SR785 output from the DC and provides a sinusoidal output. The second amplifier in the AD8034 accumulates the DC and sinusoidal power supplied to the negative supply of the DUT\'s (product under test). The schematic omits all bypass capacitors for the negative supply under test. A kiloohm resistor is connected from pin 3 to ground to prevent input instability of the amplifier. The external positive DC supply is connected to pin 6 through a kiloohm resistor. Finally, connect the output of the device under test to the 2A channel of the SR85 to complete the test circuit configuration.
Figure 1 Negative power supply ripple rejection ratio test circuit configuration

The AD8034 is a good choice for building a dual amplifier because it can provide a voltage range of 5V to 24V. The signal frequency response is far beyond 1 MHz and has a large capacitive load drive capability, so you can ignore the capacitance of the test cable. In addition, the AD8034 can provide up to 40ma of current.

To build your confidence in how the buffer/inverter-summer construction works, Figure 2 demonstrates that you can ignore any losses introduced by the AD8034. The figure shows that the AD8034 buffer/inverter-summer response has only about 0.0025 dB of loss from 0 Hz to 10 kHz and about 0.024 dB of loss from 10 to 100 kHz. Figure 3 shows the results of a negative power supply ripple rejection ratio test. The HP8753 provides a PSRR-Versus-Frequency response that extends beyond 100 kHz. You can test the positive power supply ripple rejection ratio (Figures 4 and 5) by connecting pin 3 to the output of the SR785. The buffer amplifier's VOUT (pin 1) connects to the reference port of the SR785. You can use the first amplifier to separate the DC from the output of the SR785 and provide a sinusoidal output. The second amplifier sums the DC and sinusoidal to supply the DUT\'s (the device under test) positive port. You must remove all bypass capacitors on the DUT's (the device under test) positive port. A 1000 ohm resistor is connected from pin 3 to ground to prevent the amplifier input from being unstable. An external DC power supply is connected from pin 6 through a 1000 ohm resistor to supply the negative power supply. Connect the output of the product under test to channel 2 of the SR785 to complete the test circuit configuration. [page]
Figure 2 proves that you can ignore any losses caused by the AD8034 product
Figure 3 shows the negative power supply ripple rejection ratio test results
By connecting pin 3 to the output port 1 of SR785
By connecting pin 3 to output port 2 of SR785

For the AD8034, assume that the maximum supply voltage of the product under test is ±15V, you need to test negative power supply ripple rejection, and the supply voltage of the product under test is ±10V. If you want the maximum output peak of the SR785 to be 5V, the first amplifier in the AD8034 product needs enough headroom to avoid filtering the ±5V signal out of the SR785 output port. In this case, the supply of the AD8034 product is set to 6 to -16V to prevent any problems. This amount provides enough headroom to accommodate the first amplifier of the AD8034 product that can handle the range centered on ±5V . The -16V can accommodate the second amplifier of the AD8034 product that outputs ±5V signals centered on -10V. The positive power supply ripple rejection ratio is the same as the negative positive power supply ripple rejection ratio just set, just set the product supply to 16V to -6V to solve this problem.

Keywords:psrr  AD8034 Reference address:Performing PSRR Testing with an Analyzer Without a DC Bias Port

Previous article:A simple dual constant current load to test low current power supplies
Next article:Simulation and design of voltage full cycle zero-crossing detection circuit without phase-locked loop

Recommended ReadingLatest update time:2024-11-17 02:36

Application of LDO low dropout linear regulator in switching power supply
Introduction to LDO LDO is a micro-power low-dropout linear regulator, which usually has extremely low self-noise and high power supply rejection ratio PSRR (Power Supply Rejection Ratio). The structure of the LDO low-dropout linear regulator is shown in Figure (2). It mainly includes a startup c
[Power Management]
PSRR and Noise of Regulators in RF Circuits
LDO is a micro-power low-dropout linear regulator with extremely low self-noise and high power supply rejection ratio (PSRR). The SGM2007 high-performance low-dropout linear regulator has an output noise of 30µV (RMS) in the frequency range of 10Hz to 100kHz, and a power supply rejection ratio (PSRR) of up to 73dB
[Power Management]
PSRR and Noise of Regulators in RF Circuits
Latest Test Measurement Articles
Change More Related Popular Components

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

About Us Customer Service Contact Information Datasheet Sitemap LatestNews


Room 1530, 15th Floor, Building B, No.18 Zhongguancun Street, Haidian District, Beijing, Postal Code: 100190 China Telephone: 008610 8235 0740

Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号