What determines the speed of USB3.0, USB3.1, and ThunderBolt?

Source: Content from Lin Yanru's History Talk , Thanks.

In the 1970s and 1980s, various data transmission protocols emerged, such as T1/E1 carrier system (2.048Mbps), X.25 relay system, ISDN (Integrated Services Digital Network), etc. The speed was relatively slow at that time. In the 1990s, SDH (Synchronous Digital Hierarchy) and SONET (Synchronous Optical Network) standards appeared. The basic speeds were STM-1 155.520Mbps, STM-4 622.080Mbps, and STM-16 2488.240Mbps. Later, WDM (Wavelength Division Multiplexing) technology and the latest OTN (Optical Transport Network) technology were introduced. The most important concept here is TDM (Time Division Multiplexing).

Time-Division Multiplexing (TDM) is a digital or (more rarely) analog multiplexing technique. Using this technique, more than two signals or data streams can be transmitted simultaneously on a communication line, which is manifested as subchannels of the same communication channel. But physically, the signals still take turns occupying the physical channel. The time domain is divided into a number of small segments that are cyclical, each of which is of fixed length, and each time period is used to transmit a subchannel. For example, the samples of subchannel 1, which may be bytes or data blocks, use time period 1, subchannel 2 uses time period 2, and so on. A TDM frame contains a time period for a subchannel. When the last subchannel is transmitted, this process will be repeated to transmit a new frame, which is the next signal segment.

Digital transmission is like packing a package. The most basic unit is a small package. Four small packages are packed into a medium package, four medium packages are packed into a large package, four large packages are packed into a larger package, and then a super large package. For example, the transmission speed of SONET is STM-1/-4/-16, etc., which is multiplied by 2. The speed of TDM-16 is 2488.240MBps, which is what we usually call 2.5Gbps.

As mentioned above, there are always specific physical implementations. Generally, copper wires or optical cables are used for long-distance transmission. Taking optical cables as an example, data is first converted from parallel data in the circuit to serial data for transmission, and then passes through the optical fiber interface to become optical signals for transmission in the optical fiber. When receiving, the optical signal is first converted into an electrical signal, and then from serial to parallel for internal use. Among them, the process from parallel to serial/serial to parallel is called SERDES PHY. The technical implementation of high-speed SERDES is relatively difficult and must be implemented by analog circuits. In many cases, it is a separate SERDES PHY chip. There are special companies to do this, such as TI, which is well-known in the industry. Its TI chips sell very well. Gradually realize such an industrial chain: those who make digital circuits, analog circuits, test equipment, and manufacturing (including PCB and SERDES PHY, optical ports, optical fibers, etc.) have already set a basic rate. The upgrade is often X2 superposition, which is best achieved in digital circuits. There is also such motivation in analog circuits, and the entire technology has been moving forward like this.

Back to the title, what determines the high-speed serial interface? The PCI bus was proposed by Intel in 1991, and then handed over to the third-party organization PCI SIG. PCI SIG is an alliance composed of many companies in the industry, and other companies can also apply to become members. TI is also one of the early members. Just like the United Nations, companies such as Intel have greater dominance like permanent members of the Security Council; USB was formed by the leader Intel in 1994 and Microsoft, HP, NEC and other computer companies to form the USB-IF organization, and launched the USB1.0 standard in 1996; (FireWare FireWire launched by Apple at the same time also became popular for many years) It can be seen that Intel has always had great dominance in the establishment and development of PCI/PCIE and USB.

When PCIE was first developed in 2001 and it was decided to replace the parallel PCI bus with a serial mode, the 2.5G PHY in the industry was already relatively mature at that time, so it was normal for the PCI organization PCI-SIG to directly borrow from this speed; when PCIE2.0 was released in 2007, it was already past 2007, and X2 became 5G directly; USB3.0 was released in 2008, so it was normal to directly borrow from the more mature 5G solution in the industry; and PCIE3.0 was released in 2010 (why PCIE3.0 is 8G instead of 10G? This is a compromise. The faster the speed, the higher the requirements for PCB routing design and production, cables, test instruments, etc. USB3.0 uses 64b/66b or 128b/130b encoding schemes, 8G*64/66=7.88G, and the decoded speed is almost twice that of 2.0. 2.0 uses traditional 8b/10b encoding, and the decoded speed is 5G*8/10=4G).

When USB3.1 was released, which was quite recently (2014), we felt that 10G PHY was relatively mature, so we just adopted 10G. USB3.1 uses 128b/132b encoding, and its efficiency is equivalent to PCIE3.0. It directly borrows a lot of content from PCIE.

ThunderBolt is positioned for even higher-speed transmission. Its 1.0 speed was originally designed with one 10G PHY channel (around 2011), and then 2.0 became two 10G PHY channels. The most recent 3.0 has two 20G PHY channels. Why not directly use 40G PHY? The process is not up to standard.

A long time ago, there was a legend in the industry that the maximum speed of copper-interface PCB routing can only reach 16G, which has been broken a few years ago. There are already DEMO demonstrations of high-speed PHY running on copper-interface at 28G or even 32G. ThunderBolt2.0 launched two 10G PHYs, and naturally the industry has the ability to launch mature products. Not surprisingly, ThunderBolt is positioned at the high end. From the first MAC computer with the 1.0 interface (2011), it has been four years now, and it is relatively unpopular. It is only equipped on high-end computers. Its peripheral products, such as external storage and high-definition monitors that support this interface, have been reported, but there are really not many on the market, which is still a big difference compared to the USB3.0 that has become popular in recent years. The DisplayPort interface has a similar treatment. The display interface has evolved from the earliest VGA to DVI, to the HDMI and DisplayPort interfaces that support both sound and image transmission. HDMI has gradually become common, especially on TV interfaces, while DisplayPort is still not very common. ThunderBolt is compatible with the Mini DP interface in appearance, and can be considered as a combination of the image transmission interface DP and the data transmission protocol PCIE in function.

So Intel decided to change ThunderBolt3.0 to be compatible with USB3.1 Type-C interface, so that peripherals that support ThunderBolt3.0 can be connected to the corresponding ThunderBolt3.0 host and enjoy 40G high speed, or connected to USB3.1 Type-C, although it can only run at USB3.0 5G speed (note that the information shows that the compatible controller is USB3.0, not the latest USB3.1; some people also pointed out that the controller launched by Intel supports 10G speed. In any case, the PHY channel is supported, which mainly depends on the controller part). In fact, this is also a big benefit for peripheral manufacturers, and users can buy them with confidence without worrying about the interface not being supported.

Finally, let's summarize: What determines the speed of high-speed serial interfaces? The accumulation and influence of previous generation technologies and mature technologies when the protocol was announced are important factors. For example, the relationship between 2.5G rate and STM-1 155M, the maturity of PHY technology in different eras, and the appeal and technological foresight of industry-leading companies in setting standards, such as Intel's dominance in multiple protocols.

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