Abstract: This paper introduces the measurement method of single-phase power line impedance, and designs a new digital single-phase power line impedance measuring instrument based on FPGA. In the system design, DDS technology is used to generate high-precision sinusoidal excitation signals, and SOPC technology is used to integrate 32-bit NIOSⅡ CPU and required peripheral resources in the FPGA chip, which reduces the design difficulty and improves the system integration. The programmable switched capacitor filter is used for narrow-band filtering to effectively filter out the power frequency harmonic interference. The measuring instrument has achieved high measurement accuracy in experimental measurements and can meet the application requirements of actual engineering. [Author Abstract]
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