Abstract: Based on FPGA, the liquid crystal display driving method is studied. Referring to the logic and timing requirements of TFT-LCD CJM10C11, a 32×32 variable width pixel point liquid crystal display driving circuit is designed. The IP core for liquid crystal display driving is compiled using the hardware description language VHDL. This IP core is used to realize liquid crystal display with variable display coordinates, variable pixel width and variable grayscale. It is confirmed by experiments that this IP core occupies 458 LEs in 1K30. In the 1K30-3 chip, the highest clock frequency is 25.71MHz. It can meet the requirements of liquid crystal display timing and control and has flexible control; it can drive most TFT-LCDs and has good versatility; after expanding SRAM or SDRAM, it can be applied to larger-scale liquid crystal display driving and has strong portability. It is a better solution for driving TFT-LCD with FPGA. [Author Abstract]
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