PRELIMINARY
‡
64Mb MULTIBANK ASYNC/PAGE OR BURST FLASH
16Mb/32Mb/64Mb ASYNC/PAGE CellularRAM
FLASH AND
COMBO MEMORY
Features
CellularRAM
™
MT28C64416W18/W30A (PREVIEW
‡‡
)
MT28C64432W18/W30A
MT28C64464W18/W30A
Low Voltage, Wireless Temperature
Stacked die Combo package
• Includes one 64Mb Flash device
• Choice of either 16Mb, 32Mb, or 64Mb Cellular-
RAM device
Basic configuration
Flash
• Flexible multibank architecture
• 4 Meg x 16 Async/Page/Burst interface
• Support for true concurrent operations with no
latency
CellularRAM
• Low-power, high-density design
• 1 Meg x 16, 2 Meg x 16, or 4 Meg x 16 configurations
• Async/Page
F_V
CC
, V
CC
Q, F_V
PP
, C_V
CC
voltages
• 1.70V (MIN)/1.95V (MAX) F_V
CC
, C_V
CC
• 1.70V (MIN)/2.24V (MAX) V
CC
Q (W18)
• 2.20V (MIN)/3.30V(MAX) V
CC
Q (W30)
• 1.80V (TYP) F_V
PP
(in-system PROGRAM/ERASE)
• 12V ±5% (HV) F_V
PP
tolerant (factory programming
compatibility)
Fast programming Algorithm (FPA)
Enhanced suspend options
• ERASE-SUSPEND-to-READ within same bank
• PROGRAM-SUSPEND-to-READ within same bank
• ERASE-SUSPEND-to-PROGRAM within same bank
Flash device contains two 64-bit chip protection registers
for security purposes
100,000 ERASE cycles per block
Cross-compatible command set support
• Extended command set
• Common Flash interface (CFI) compliant
Manufacturer’s Identification Code (ManID)
• Micron
®
• Intel
®
is
preview
status.
The
MT28C64432W18/W30A and MT28C64464W18/W30A are
preliminary status.
††
MT28C64416W18/W30A
Figure 1: 77-Ball FBGA
1
A
B
C
D
E
F
G
H
J
K
A4
2
A18
3
A19
4
C_VSS
5
F_VCC
6
F_VCC
7
A21
8
A11
A5
C_LB#
C_VSS
NC
F_CLK
NC
A12
A3
A17
F_VPP
C_WE#
C_CE#
A9
A13
A2
A7
F_WP#
F_ADV#
A20
A10
A15
A1
A6
C_UB#
F_RST#
F_WE#
A8
A14
A16
A0
DQ8
DQ2
DQ10
DQ5
DQ13
F_WAIT#
NC
C_OE#
DQ0
DQ1
DQ3
DQ12
DQ14
DQ7
NC
NC
F_OE#
DQ9
DQ11
DQ4
DQ6
DQ15
VCCQ
F_CE#
NC
NC
NC
C_VCC
F_VCC
VCCQ
C_ZZ#
C_VSS
VSSQ
VCCQ
F_VCC
C_VSS
VSSQ
F_VSS
C_VSS
Top View
(Ball Down)
NOTE:
Balls B6, D5, and F7 are only used for Flash burst operation.
Options
Flash Timing
• 60ns
1
(W18)
• 70ns (W18/W30)
Flash Burst Frequency
• 66 MHz
1
(W18)
• 54 MHz (W18/W30)
Flash Boot Block Configuration
Top
Bottom
CellularRAM Timing
• 70ns
• 85ns
I/O Voltage Range
• VccQ 1.70V–2.24V (W18)
• VccQ 2.20V–3.30V (W30)
Manufacturer’s Identification Code (ManID)
• Micron (0x2Ch)
• Intel (0x89h)
Operating Temperature Range
• Wireless Temperature (-25°C to +85°C)
Package
• 77-ball (Standard) FBGA 8 x 10 grid
• 77-ball (Lead-free) FBGA 8 x 10 grid
2
NOTE:
1. Contact factory for availability.
2. Contact factory for details.
09005aef80c9c807
MT28C64432W18A.fm - Rev. E Pub 2/04 EN
1
©2004 Micron Technology, Inc. All rights reserved.
‡
PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE FOR EVALUATION AND REFERENCE PURPOSES ONLY AND ARE SUBJECT TO CHANGE BY MICRON WITHOUT NOTICE. PRODUCTS
‡‡
ARE ONLY WARRANTED BY MICRON TO MEET MICRON’S PRODUCTION DATA SHEET SPECIFICATIONS.
THIS DATA SHEET CONTAINS THE PRESENT DESCRIPTION OF A PRODUCT IN
DEFINITION WITH NO FORMAL DESIGN IN PROGRESS.
PRELIMINARY
64Mb MULTIBANK ASYNC/PAGE OR BURST FLASH
16Mb/32Mb/64Mb ASYNC/PAGE CellularRAM
Table of Contents
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Device General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Flash General Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Flash Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
CellularRAM General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Part Numbering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Valid Part Number Combinations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Device Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
MultiChip Packaging Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Unique IDs, State Machines, and Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
WAIT Ball Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Power Consumption. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Data Sheet Designation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
09005aef80c9c807
MT28C64432W18A.fm - Rev. E Pub 2/04 EN
2
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2004 Micron Technology. Inc. All rights reserved.
PRELIMINARY
64Mb MULTIBANK ASYNC/PAGE OR BURST FLASH
16Mb/32Mb/64Mb ASYNC/PAGE CellularRAM
List of Figures
Figure 1:
Figure 2:
Figure 3:
Figure 4:
77-Ball FBGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Part Number Chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
77-Ball FBGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
09005aef80c9c807
MT28C64432W18A.fm - Rev. E Pub 2/04 EN
3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2004 Micron Technology. Inc. All rights reserved.
PRELIMINARY
64Mb MULTIBANK ASYNC/PAGE OR BURST FLASH
16Mb/32Mb/64Mb ASYNC/PAGE CellularRAM
List of Tables
Table 1:
Table 2:
Table 3:
Table 4:
Table 5:
Table 6:
Table 7:
Table 8:
Ball Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Truth Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
CFI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
09005aef80c9c807
MT28C64432W18A.fm - Rev. E Pub 2/04 EN
4
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2004 Micron Technology. Inc. All rights reserved.
PRELIMINARY
64Mb MULTIBANK ASYNC/PAGE OR BURST FLASH
16Mb/32Mb/64Mb ASYNC/PAGE CellularRAM
Device General Description
The MT28C64416W18/W30A, MT28C64432W18/
W30A, and MT28C64464W18/W30A combination
Flash and CellularRAM are high-performance, high-
density, memory solutions that can significantly
improve system performance. This memory solution is
comprised of one 64Mb Flash device and one 16Mb,
32Mb, or 64Mb CellularRAM device.
It is important to note that the specifications con-
tained in this document supersede the specifications
listed in the referenced individual Flash and Cellular-
RAM data sheets.
For all asyncronous/page Flash devices, the burst
mode specifications in the referenced Flash discrete
data sheet should be ignored, as they do not pertain to
asyncronous/page mode operation.
The Flash memory features eight 4K-word sectors (8
x 65,536 bits), designated as parameter blocks, and the
remaining part is organized in main blocks of 32K
words each (524,288 bits). The parameter blocks are
addressed either by the low order addresses (bottom
boot) or by the higher order addresses (top boot).
CellularRAM General Description
The CellularRAM architecture features high-speed
CMOS, dynamic random-access memories developed
for low-power portable applications The CellularRAM
device is available in either 16Mb, 32Mb, or 64Mb
densities.
To operate seamlessly on a burst Flash bus, Cellular-
RAM products have incorporated a transparent self-
refresh mechanism. The hidden refresh requires no
additional support from the system memory controller
and has no significant impact on device read/write
performance.
The configuration register (CR) is used to control
how refresh is performed on the CellularRAM array.
These registers are automatically loaded with default
settings during power-up and can be updated any time
during normal operation. Special attention has been
focused on standby current consumption during self-
refresh.
CellularRAM products include three system-acces-
sible mechanisms used to minimize standby current.
Partial array refresh (PAR) limits refresh to the portion
of the memory array being used. Temperature com-
pensated refresh (TCR) is used to adjust the refresh
rate according to the ambient temperature. The
refresh rate can be decreased at lower temperatures to
minimize current consumption during standby. Deep
power down (DPD) halts the refresh operation alto-
gether and is used when no vital information is stored
in the device. These three refresh mechanisms are
adjusted through the configuration register (CR) .
For device specifications and additional documenta-
tion concerning CellularRAM, please refer to the
MT45W1ML16PFA
and
MT45W2MW16PFA,
MT45W2MW16PFA and MT45W4MW16PFA Cellular-
RAM data sheets at
www.micron.com/cellularram.
Flash General Description
The Flash architecture features a multipartition
configuration that supports READ-while-PROGRAM/
ERASE operations with no latency. A 4Mb partition size
enables optimal design flexibility.
The Flash device enables soft protection for blocks,
as read only, by configuring soft protection registers
with dedicated command sequences. For security pur-
poses, one user-programmable 64-bit chip protection
register is provided for the Flash device.
The embedded WORD PROGRAM and BLOCK
ERASE functions are fully automated by an on-chip
write state machine (WSM). An on-chip device status
register can be used to monitor the WSM status and
determine the progress of the PROGRAM/ERASE tasks.
The Flash device has a read configuration register (RCR)
that defines how the Flash interacts with the memory bus.
For device specifications and additional documentation
concerning Flash features, please refer to the
MT28F644W18/W30 data sheet at
www.micron.com/
flash.
Flash Configurations
The Flash memory implements a multibank archi-
tecture (16 banks of 4Mb each) to allow concurrent
operations. Any address within a block address range
selects that block for the required READ, PROGRAM, or
ERASE operation.
09005aef80c9c807
MT28C64432W18A.fm - Rev. E Pub 2/04 EN
5
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2004 Micron Technology. Inc. All rights reserved.
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