rar

Design of high-speed data acquisition system based on USB2.0 bus

  • 2013-08-31
  • 324.61KB
  • Points it Requires : 1

Abstract: Combining the current problems faced by high-speed acquisition of charge coupled device (CCD) signals and the outstanding advantages of USB bus, a high-speed data acquisition system is designed and implemented using USB2.0 interface chip EZ-USB FX2 series CY7C68013A as USB controller, complex programmable logic device (CPLD) EPM7128S as control core, external high-speed first-in-first-out (FFO) memory and 16-bit high-speed A/D conversion module. The hardware and software design are introduced in detail. Compared with traditional design, this system has the characteristics of fast acquisition speed and high sampling accuracy.  

unfold

You Might Like

Uploader
欣之
 

Recommended ContentMore

Popular Components

Just Take a LookMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

About Us Customer Service Contact Information Datasheet Sitemap LatestNews


Room 1530, 15th Floor, Building B, No.18 Zhongguancun Street, Haidian District, Beijing, Postal Code: 100190 China Telephone: 008610 8235 0740

Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号
×