By collating a large number of technical articles, this book focuses on all aspects of the FPGA development process: synthesis, simulation, ASIC design migration, layout planning, timing convergence, design methodology, performance/area/power optimization, RTL code style. IP core selection, and other related topics. This book focuses on system architects, design engineers, and teachers and students of related majors to improve their FPGA design skills. However, both novice and experienced engineers can find useful information in the book. The author of this book has many years of practical experience and is equipped with a large number of illustrations, code examples, and scripts in the book. The content covered in this book is highly targeted, and all the topics discussed are centered around the Xilinx Virtex-6 and Spartan-6 FPGA architectures. All the codes in this book use the Verilog HDL language.
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