CH421 is an interface chip that provides bidirectional data buffering. CH421 has two 8-bit passive parallel ports, X and Y. By providing 64 bytes of data buffer in the two data transmission directions of XY and YX, bidirectional asynchronous data exchange between the X end and the Y end is realized. CH421 supports simultaneous operation of both ends and is suitable for connecting MCU to MCU, MCU to DSP/MCU, and MCU to other host terminals with active parallel interfaces, such as the printer port of a computer or the local port of CH365. The following figure is a general application block diagram. 2. Features ● Universal 8-bit bidirectional data bus, which can be directly connected to the system bus of a MCU or DSP. ● Use SRAM to provide 64 bytes of data buffer in the two data transmission directions of XY and YX. ● Low-level effective universal parallel interface control signals: chip select control line, read strobe line, write strobe line. ● The X end supports index port addressing mode or data address bus multiplexing mode. ● The Y end supports index port addressing mode and supports automatic index address increment. ● Data transmission speed is greater than 3M bytes per second. ● Asynchronous data exchange, supports simultaneous read and write operations at both ends of X and Y, without synchronization and waiting. ● Adopts standard 28-pin SMD package: SOP28.
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