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ATmega406 Preliminary

2013-09-22
1.73MB
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Features • High Performance, Low Power AVR® 8-bit Microcontroller • Advanced RISC Architecture – 124 Powerful Instructions - Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers – Fully Static Operation – Up to 1 MIPS Throughput at 1 MHz • Nonvolatile Program and Data Memories – 40K Bytes of In-System Self-Programmable Flash, Endurance: 10,000 Write/Erase Cycles – Optional Boot Code Section with Independent Lock Bits In-System Programming by On-chip Boot Program True Read-While-Write Operation – 512 bytes EEPROM, Endurance: 100,000 Write/Erase Cycles – 2K Bytes Internal SRAM – Programming Lock for Software Security • On-chip Debugging – Extensive On-chip Debug Support – Available through JTAG interface • Battery Management Features – Two, Three, or Four Cells in Series – Deep Under-voltage Protection – Over-current Protection (Charge and Discharge) – Short-circuit Protection (Discharge) – Integrated Cell Balancing FETs – High Voltage Outputs to Drive Charge/Precharge/Discharge FETs

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