A design method for a real-time video signal processing platform based on FPGA is proposed. The system receives low frame rate digital YCbCr video signals, performs format and color space conversion, pixel sum, uses off-chip SDRAM memory as frame buffer and improves the frame rate through the timing controller, and finally amplifies the image signal through the VGA control module and displays it in real time on the VGA display. The entire design is implemented using Verilog HDL language, using Altera\'s EP2S60F1020C3N chip as the core device and the function is verified.
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