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AL5DS9289V

Description
3.3V synchronous dual-port sram 4K/8K/16k/32k/64k/128k x 8/9/16/18-bit
File Size107KB,2 Pages
ManufacturerAverLogic
Websitehttp://www.averlogic.com
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AL5DS9289V Overview

3.3V synchronous dual-port sram 4K/8K/16k/32k/64k/128k x 8/9/16/18-bit

AL5DS9xx9V
3.3V Synchronous Dual-Port SRAM
4K/8K/16K/32K/64K/128K x 8/9/16/18-bit
Features
True dual ported memory cells
17 Flow-Through/Pipelined devices:
-- 4K/8K/16K/32K/64K x 18-bit organization (AL5DS9349V/59V/69V/79V/89V)
-- 16K/32K/64K x 16-bit organization (AL5DS9269V/79V/89V)
-- 8K/16K/32K/64K/128K x 9-bit organization (AL5DS9159V/69V/79V/89V/99V)
-- 16K/32K/64K/128K x 8-bit organization (AL5DS9069V/79V/89V/99V)
Supports byte write/read for 16/18 bit devices
Separate upper-byte and lower-byte controls for bus matching (16/18 bit devices only)
3 modes supported:
-Pipelined
-Flow-Through
-Burst
Counter enable and reset
Fast (100-MHz) operation on both ports in Pipelined output mode
Supports depth and width expansion
0.25-micron CMOS for optimum speed / power
High speed clock to data access
3.3V low operating power
Pin-compatible and functionally equivalent to IDT or Cypress
Available in 100 or 128 pin TQFP
Architecture
AL5DS9xx9V Preliminary Rev: 1.0
1

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Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
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