Intel® Atom™ Processor N400 &
N500 Series
Datasheet - Volume 1
This is volume 1 of 2. Refer to Document Ref# 322848 for Volume 2.
June 2011
Revision 003
Document Number: 322847-003
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Copyright © 2011. Intel Corporation. All rights reserved.
2
Specification Update
Contents
1
Introduction
..............................................................................................................8
1.1
1.2
Processor Features ..............................................................................................8
Interfaces...........................................................................................................9
1.2.1 System Memory Support ...........................................................................9
1.2.2 Direct Media Interface Features ................................................................ 10
1.2.3 Integrated Graphics Controller ................................................................. 10
Clocking ........................................................................................................... 11
Power Management Support ............................................................................... 11
Package ........................................................................................................... 11
Terminology ..................................................................................................... 11
References ....................................................................................................... 13
System Block Diagram ....................................................................................... 14
Processor Legacy Signals.................................................................................... 16
System Memory Interface................................................................................... 19
Reset and Miscellaneous Signals .......................................................................... 20
DMI - Direct Media Interface ............................................................................... 21
PLL Signals ....................................................................................................... 22
Analog Display Signals ....................................................................................... 22
LVDS Signals .................................................................................................... 23
TAP Signals ...................................................................................................... 23
Error and Thermal Protection .............................................................................. 24
Processor Core Power Signals.............................................................................. 24
Graphics, DMI and Memory Core Power Signals ..................................................... 25
Ground ............................................................................................................ 25
Integrated Memory Controller ............................................................................. 26
3.1.1 System Memory Organization Modes ......................................................... 26
3.1.2 System Memory Technology Supported ..................................................... 26
3.1.3 Rules for populating SO-DIMM slots .......................................................... 27
3.1.4 Intel
®
Fast Memory Access (Intel
®
FMA) Technology Enhancements ............. 28
3.1.5 DRAM Clock Generation........................................................................... 29
Integrated Graphics Controller ............................................................................ 29
3.2.1 3D Graphics Pipeline ............................................................................... 29
3.2.2 Video Engine ......................................................................................... 30
3.2.3 2D Engine ............................................................................................. 31
3.2.4 Display Pipes ......................................................................................... 32
3.2.5 Display Ports ......................................................................................... 32
3.2.6 VESA/VGA Mode..................................................................................... 36
3.2.7 Multiple Display Configurations................................................................. 36
Thermal Sensor................................................................................................. 36
3.3.1 PCI Device 0, Function 0 ......................................................................... 36
Power Management ........................................................................................... 37
Intel® Hyper-Threading Technology .................................................................... 37
Power and Ground Balls ..................................................................................... 38
1.3
1.4
1.5
1.6
1.7
1.8
2
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10
2.11
2.12
3
3.1
Signal Description....................................................................................................
15
Functional Description
............................................................................................. 26
3.2
3.3
3.4
3.5
4
4.1
Electrical Specifications
........................................................................................... 38
Specification Update
3
4.2
4.3
4.4
4.5
4.6
4.7
4.8
4.9
4.10
Decoupling Guidelines ........................................................................................38
4.2.1 Voltage Rail Decoupling ...........................................................................38
Processor Clocking .............................................................................................39
4.3.1 PLL Power Supply ...................................................................................39
Voltage Identification (VID).................................................................................39
Catastrophic Thermal Protection ..........................................................................41
Reserved or Unused Signals ................................................................................41
Signal Groups ...................................................................................................41
Test Access Port (TAP) Connection .......................................................................42
Absolute Maximum and Minimum Ratings..............................................................42
DC Specifications ...............................................................................................43
4.10.1 Voltage and Current Specifications ............................................................43
4.10.2 Interface DC Specifications ......................................................................47
ACPI States Supported .......................................................................................54
5.1.1 System States........................................................................................54
5.1.2 Processor Idle States...............................................................................54
5.1.3 Integrated Graphics Display States ...........................................................55
5.1.4 Integrated Memory Controller States .........................................................55
5.1.5 DMI States ............................................................................................55
5.1.6 Interface State Combinations ...................................................................55
Processor Core Power Management ......................................................................56
5.2.1 Enhanced Intel SpeedStep® Technology ....................................................56
5.2.2 Dynamic Cache Sizing .............................................................................57
5.2.3 Low-Power Idle States.............................................................................57
5.2.4 Thread C-states Description .....................................................................60
5.2.5 Processor Core/Package C-states Description..............................................61
External Thermal Sensor PM_EXTTS1#: Implementation for Fast C4/C4E Exit ............64
Thermal Specifications........................................................................................66
6.1.1 Thermal Diode........................................................................................67
6.1.2 Intel® Thermal Monitor ...........................................................................69
6.1.3 Digital Thermal Sensor ............................................................................71
6.1.4 Out of Specification Detection...................................................................72
6.1.5 PROCHOT# Signal Pin .............................................................................72
Package Mechanical Specifications .......................................................................74
7.1.1 Package Mechanical Drawings...................................................................74
7.1.2 Package Loading Specifications .................................................................75
Processor Ballout Assignment ..............................................................................75
5
Power Management
.................................................................................................54
5.1
5.2
5.3
6
6.1
Thermal Specifications and Design Considerations...................................................66
7
Package Mechanical Specifications and Ball Information..........................................74
7.1
7.2
4
Intel Confidential
Specification Update
Figures
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
1-1
3-2
3-3
3-4
4-5
5-6
5-7
5-8
5-9
7-10
7-11
7-12
7-13
7-14
Platform Block Diagram ........................................................................... 14
LVDS Signals and Swing Voltage .............................................................. 34
LVDS Clock and Data Relationship ............................................................ 34
Panel Power Sequencing.......................................................................... 35
V
CC
and I
CC
Processor Loadline................................................................. 45
Idle Power Management Breakdown of the Processor Thread ........................ 58
Thread C-state ....................................................................................... 59
Processor Core Low-power States ............................................................. 59
PM_EXTTS1#/DPSLPVR Implementation for Fast C4/C4E Exit ....................... 65
Package Mechanical Drawings .................................................................. 74
Package Pinmap (Top View, Upper-Left Quadrant) ...................................... 75
Package Pinmap (Top View, Upper-Right Quadrant) .................................... 76
Package Pinmap (Top View, Lower-Left Quadrant) ...................................... 77
Package Pinmap (Top View, Lower-Right Quadrant) .................................... 78
Tables
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2-1
2-2
2-3
2-4
2-5
2-6
2-7
2-8
2-9
2-10
2-11
2-12
2-13
2-14
2-15
3-16
3-17
3-18
3-19
4-20
4-21
4-22
4-23
4-24
4-25
4-26
4-27
4-28
4-29
4-30
Signal Types .......................................................................................... 15
Signal Description Buffer Types ................................................................ 15
Processor Legacy Signals......................................................................... 16
System Memory Interface........................................................................ 19
Memory Reference and Compensation ....................................................... 20
Reset and Miscellaneous Signals ............................................................... 20
DMI - Processor to Chipset Serial Interface ................................................ 21
PLL Signals ............................................................................................ 22
Analog Display Signals ............................................................................ 22
LVDS Signals ......................................................................................... 23
TAP Signals ........................................................................................... 23
Error and Thermal Protection ................................................................... 24
Processor Core Power Signals................................................................... 24
Power Signals ........................................................................................ 25
Ground ................................................................................................. 25
Supported SO-DIMM Module Configurations ............................................... 27
Supported DDR3 S0-DIMM module Configurations ...................................... 27
Analog Port Characteristics ...................................................................... 33
Panel Power Sequencing Timing Parameters............................................... 35
Voltage Identification Definition ................................................................ 39
Processor Absolute Minimum and Maximum Ratings .................................... 42
Processor Core Active and Idle Mode DC Voltage and Current Specifications ... 44
Processor I/O Buffer Supply DC Voltage and Current Specifications ............... 46
Input Clocks (BCLK, HPL_CLKIN, REFCLKIN, EXP_CLKIN) Differential
Specification .......................................................................................... 47
DDR2/DDR3 Signal Group DC Specifications............................................... 47
GTL Signal Group DC Specifications .......................................................... 48
Legacy CMOS Signal Group DC Specification .............................................. 49
Open Drain Signal Group DC Specification.................................................. 50
PWROK and RSTIN# DC Specification........................................................ 50
CPUPWRGOOD DC Specification................................................................ 50
Specification Update
5
Power technology
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