Special terms.................................................................................................................................................. 36
ARM Cortex-M0+ core modules................................................................................................................... 38
System modules............................................................................................................................................. 39
Memories and memory interfaces..................................................................................................................40
Security and integrity modules...................................................................................................................... 41
Analog modules............................................................................................................................................. 41
Communication interfaces............................................................................................................................. 42
Module to module interconnects...................................................................................................................................43
Analog reference options............................................................................................................................... 45
KL17 Sub-Family Reference Manual , Rev. 4, September 2014
Freescale Semiconductor, Inc.
3
Section number
Title
Chapter 3
Core Overview
Page
3.1
ARM Cortex-M0+ core introduction............................................................................................................................ 47
3.1.1
3.1.2
3.1.3
3.1.4
Buses, interconnects, and interfaces.............................................................................................................. 47
System tick timer........................................................................................................................................... 47
Erase all flash contents...................................................................................................................................54
SRAM retention in low power modes............................................................................................................56
4.3
4.4
4.5
4.6
System Register file...................................................................................................................................................... 56
System memory map.....................................................................................................................................................57
Bit Manipulation Engine...............................................................................................................................................58
KL17 Sub-Family Reference Manual , Rev. 4, September 2014
Clock divider values after reset......................................................................................................................68
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