L6401GH3640MR datasheet, PDF - EEWORLD Datasheet

L6401GH3640MR: DescriptionFixed Positive LDO Regulator, 2 Output, 3.6V1, 4V2, CMOS, PDSO6, SOT-26, 6 PIN; CategoryPower/power management The power supply circuit; File Size510KB，7 Pages; ManufacturerLRC; Websitehttp://www.lrc.cn

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L6401GH3640MR Overview

Fixed Positive LDO Regulator, 2 Output, 3.6V1, 4V2, CMOS, PDSO6, SOT-26, 6 PIN

Parameter Name	Attribute value
Objectid	7158412300
package instruction	LSSOP,
Reach Compliance Code	unknown
ECCN code	EAR99
Maximum drop-back voltage 1	0.3 V
Maximum drop-back voltage 2	0.3 V
Maximum input voltage	8 V
Minimum input voltage	4.5 V
JESD-30 code	R-PDSO-G6
length	2.9 mm
Number of functions	1
Output times	2
Number of terminals	6
Maximum output voltage 1	3.672 V
Minimum output voltage 1	3.528 V
Nominal output voltage 1	3.6 V
Maximum output voltage 2	4.08 V
Minimum output voltage 2	3.92 V
Nominal output voltage 2	4 V
Package body material	PLASTIC/EPOXY
encapsulated code	LSSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
Regulator type	FIXED POSITIVE MULTIPLE OUTPUT LDO REGULATOR
Maximum seat height	1.3 mm
surface mount	YES
technology	CMOS
Terminal form	GULL WING
Terminal pitch	0.95 mm
Terminal location	DUAL
Maximum voltage tolerance	2%
width	1.6 mm

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