V62C2181024L-55R datasheet, PDF

V62C2181024L-55R: DescriptionStandard SRAM, 128KX8, 55ns, CMOS, PDSO32; Categorystorage storage; File Size398KB，10 Pages; ManufacturerMosel Vitelic Corporation ( MVC ); Websitehttp://www.moselvitelic.com

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V62C2181024L-55R Overview

Standard SRAM, 128KX8, 55ns, CMOS, PDSO32

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Objectid	101221441
package instruction	SOJ, SOJ32,.44
Reach Compliance Code	unknown
ECCN code	EAR99
Maximum access time	55 ns
I/O type	COMMON
JESD-30 code	R-PDSO-J32
JESD-609 code	e0
memory density	1048576 bit
Memory IC Type	STANDARD SRAM
memory width	8
Number of terminals	32
word count	131072 words
character code	128000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	128KX8
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	SOJ
Encapsulate equivalent code	SOJ32,.44
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Parallel/Serial	PARALLEL
power supply	3 V
Certification status	Not Qualified
Maximum standby current	0.000001 A
Minimum standby current	2 V
Maximum slew rate	0.03 mA
Nominal supply voltage (Vsup)	3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	DUAL

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