Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs
| Parameter Name | Attribute value |
| Brand Name | Fairchild Semiconduc |
| Is it lead-free? | Lead free |
| Is it Rohs certified? | conform to |
| Maker | Fairchild |
| Parts packaging code | TSSOP |
| package instruction | 4.40 MM, LEAD FREE, MO-153AB, TSSOP-14 |
| Contacts | 14 |
| Manufacturer packaging code | 14 LD,TSSOP,JEDEC MO-153, 4.4MM WIDE |
| Reach Compliance Code | compli |
| ECCN code | EAR99 |
| Samacsys Descripti | AND Gate,Quad 2 Input CMOS TSSOP 14 Pin 74LCX08MTCX, Logic Gate Quad 2 Input AND, LCX, LVCMOS 24mA 2 → 3.6 V 14-Pin TSSOP |
| series | LVC/LCX/Z |
| JESD-30 code | R-PDSO-G14 |
| JESD-609 code | e4 |
| length | 5 mm |
| Load capacitance (CL) | 50 pF |
| Logic integrated circuit type | AND GATE |
| MaximumI(ol) | 0.024 A |
| Humidity sensitivity level | 1 |
| Number of functions | 4 |
| Number of entries | 2 |
| Number of terminals | 14 |
| Maximum operating temperature | 85 °C |
| Minimum operating temperature | -40 °C |
| Package body material | PLASTIC/EPOXY |
| encapsulated code | TSSOP |
| Encapsulate equivalent code | TSSOP14,.25 |
| Package shape | RECTANGULAR |
| Package form | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH |
| method of packing | TAPE AND REEL |
| Peak Reflow Temperature (Celsius) | NOT SPECIFIED |
| power supply | 3.3 V |
| Prop。Delay @ Nom-Su | 5.5 ns |
| propagation delay (tpd) | 6.6 ns |
| Certification status | Not Qualified |
| Schmitt trigger | NO |
| Maximum seat height | 1.2 mm |
| Maximum supply voltage (Vsup) | 3.6 V |
| Minimum supply voltage (Vsup) | 2 V |
| Nominal supply voltage (Vsup) | 2.5 V |
| surface mount | YES |
| technology | CMOS |
| Temperature level | INDUSTRIAL |
| Terminal surface | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Terminal form | GULL WING |
| Terminal pitch | 0.65 mm |
| Terminal location | DUAL |
| Maximum time at peak reflow temperature | NOT SPECIFIED |
| width | 4.4 mm |
| Base Number Matches | 1 |
| 74LCX08MTCX | 74LCX08BQX | 74LCX08MX | 74LCX08 | 74LCX08MTC | 74LCX08MX_NL | |
|---|---|---|---|---|---|---|
| Description | Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs | LVC/LCX/Z SERIES, QUAD 2-INPUT AND GATE, QCC14 | LVC/LCX/Z SERIES, QUAD 2-INPUT AND GATE, PDSO14 | LVC/LCX/Z SERIES, QUAD 2-INPUT AND GATE, QCC14 | Low Voltage Quad 2-Input AND Gate with 5V Tolerant Inputs | LVC/LCX/Z SERIES, QUAD 2-INPUT AND GATE, QCC14 |
| series | LVC/LCX/Z | LVC/LCX/Z | LVC/LCX/Z | LVC/LCX/Z | LVC/LCX/Z | LVC/LCX/Z |
| length | 5 mm | 3 mm | 8.6235 mm | 3 mm | 5 mm | 8.6235 mm |
| Number of functions | 4 | 4 | 4 | 4 | 4 | 4 |
| Number of terminals | 14 | 14 | 14 | 14 | 14 | 14 |
| Maximum operating temperature | 85 °C | 85 °C | 85 °C | 85 Cel | 85 °C | 85 °C |
| Minimum operating temperature | -40 °C | -40 °C | -40 °C | -40 Cel | -40 °C | -40 °C |
| surface mount | YES | YES | YES | YES | YES | YES |
| Temperature level | INDUSTRIAL | INDUSTRIAL | INDUSTRIAL | INDUSTRIAL | INDUSTRIAL | INDUSTRIAL |
| Terminal form | GULL WING | NO LEAD | GULL WING | NO LEAD | GULL WING | GULL WING |
| Terminal location | DUAL | QUAD | DUAL | QUAD | DUAL | DUAL |
| width | 4.4 mm | 2.5 mm | 3.9 mm | 2.5 mm | 4.4 mm | 3.9 mm |
| Brand Name | Fairchild Semiconduc | Fairchild Semiconduc | Fairchild Semiconduc | - | Fairchild Semiconduc | - |
| Is it lead-free? | Lead free | Lead free | Lead free | - | Lead free | Lead free |
| Is it Rohs certified? | conform to | conform to | conform to | - | conform to | conform to |
| Maker | Fairchild | Fairchild | Fairchild | - | Fairchild | Fairchild |
| Parts packaging code | TSSOP | MLP | SOIC | - | TSSOP | SOIC |
| package instruction | 4.40 MM, LEAD FREE, MO-153AB, TSSOP-14 | HVQCCN, LCC14,.1X.12,20 | 0.150 INCH, LEAD FREE, MS-012, SOIC-14 | - | 4.40 MM, LEAD FREE, MO-153AB, TSSOP-14 | SOP, SOP14,.25 |
| Contacts | 14 | 14 | 14 | - | 14 | 14 |
| Manufacturer packaging code | 14 LD,TSSOP,JEDEC MO-153, 4.4MM WIDE | 14LD,DQFN,JEDEC MO-241,2.5 X 3.0MM | 14LD,SOIC,JEDEC MS-012, .150\", NARROW BODY | - | 14 LD,TSSOP,JEDEC MO-153, 4.4MM WIDE | - |
| Reach Compliance Code | compli | compli | compli | - | compli | compli |
| ECCN code | EAR99 | EAR99 | EAR99 | - | EAR99 | - |
| JESD-30 code | R-PDSO-G14 | R-XQCC-N14 | R-PDSO-G14 | - | R-PDSO-G14 | R-PDSO-G14 |
| JESD-609 code | e4 | e4 | e3 | - | e4 | e3 |
| Load capacitance (CL) | 50 pF | 50 pF | 50 pF | - | 50 pF | 50 pF |
| Logic integrated circuit type | AND GATE | AND GATE | AND GATE | - | AND GATE | AND GATE |
| MaximumI(ol) | 0.024 A | 0.024 A | 0.024 A | - | 0.024 A | 0.024 A |
| Humidity sensitivity level | 1 | 1 | 1 | - | 1 | 1 |
| Number of entries | 2 | 2 | 2 | - | 2 | 2 |
| Package body material | PLASTIC/EPOXY | UNSPECIFIED | PLASTIC/EPOXY | - | PLASTIC/EPOXY | PLASTIC/EPOXY |
| encapsulated code | TSSOP | HVQCCN | SOP | - | TSSOP | SOP |
| Encapsulate equivalent code | TSSOP14,.25 | LCC14,.1X.12,20 | SOP14,.25 | - | TSSOP14,.25 | SOP14,.25 |
| Package shape | RECTANGULAR | RECTANGULAR | RECTANGULAR | - | RECTANGULAR | RECTANGULAR |
| Package form | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH | CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE | SMALL OUTLINE | - | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH | SMALL OUTLINE |
| method of packing | TAPE AND REEL | TAPE AND REEL | TAPE AND REEL | - | RAIL | TAPE AND REEL |
| Peak Reflow Temperature (Celsius) | NOT SPECIFIED | NOT SPECIFIED | 260 | - | NOT SPECIFIED | 260 |
| power supply | 3.3 V | 3.3 V | 3.3 V | - | 3.3 V | 3.3 V |
| Prop。Delay @ Nom-Su | 5.5 ns | 5.5 ns | 5.5 ns | - | 5.5 ns | 5.5 ns |
| propagation delay (tpd) | 6.6 ns | 6.6 ns | 6.6 ns | - | 6.6 ns | 6.6 ns |
| Certification status | Not Qualified | Not Qualified | Not Qualified | - | Not Qualified | Not Qualified |
| Schmitt trigger | NO | NO | NO | - | NO | NO |
| Maximum seat height | 1.2 mm | 0.8 mm | 1.753 mm | - | 1.2 mm | 1.753 mm |
| Maximum supply voltage (Vsup) | 3.6 V | 3.6 V | 3.6 V | - | 3.6 V | 3.6 V |
| Minimum supply voltage (Vsup) | 2 V | 2 V | 2 V | - | 2 V | 2 V |
| Nominal supply voltage (Vsup) | 2.5 V | 2.5 V | 2.5 V | - | 2.5 V | 2.5 V |
| technology | CMOS | CMOS | CMOS | - | CMOS | CMOS |
| Terminal surface | Nickel/Palladium/Gold (Ni/Pd/Au) | Nickel/Palladium/Gold (Ni/Pd/Au) | Matte Tin (Sn) | - | Nickel/Palladium/Gold (Ni/Pd/Au) | Matte Tin (Sn) |
| Terminal pitch | 0.65 mm | 0.5 mm | 1.27 mm | - | 0.65 mm | 1.27 mm |
| Maximum time at peak reflow temperature | NOT SPECIFIED | NOT SPECIFIED | NOT SPECIFIED | - | NOT SPECIFIED | NOT SPECIFIED |
| Base Number Matches | 1 | 1 | 1 | - | 1 | 1 |
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