PIC32MX370F512HT-100I/MR datasheet, PDF

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PIC32MX370F512HT-100I/MR: DescriptionRISC MICROCONTROLLER; CategoryThe embedded processor and controller Microcontrollers and processors; File Size12MB，344 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com

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PIC32MX370F512HT-100I/MR Overview

RISC MICROCONTROLLER

PIC32MX370F512HT-100I/MR Parametric

Parameter Name	Attribute value
Objectid	1356840817
package instruction	QFN-64
Reach Compliance Code	compliant
ECCN code	3A001.A.3
Has ADC	YES
Address bus width
bit size	32
maximum clock frequency	100 MHz
DAC channel	NO
DMA channel	YES
External data bus width
JESD-30 code	S-PQCC-N64
length	9 mm
Number of I/O lines	53
Number of terminals	64
On-chip program ROM width	8
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	HVQCCN
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
ROM programmability	FLASH
Filter level	TS 16949
Maximum seat height	1 mm
speed	100 MHz
Maximum supply voltage	3.6 V
Minimum supply voltage	2.3 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
width	9 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER, RISC

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PIC32MX330/350/370/430/450/470

32-bit Microcontrollers (up to 512 KB Flash and 128 KB SRAM)

with Audio/Graphics/Touch (HMI), USB, and Advanced Analog

Operating Conditions

• 2.3V to 3.6V, -40ºC to +105ºC (DC to 80 MHz),

-40ºC to +85ºC (DC to 100 MHz)

Timers/Output Compare/Input Capture

• Five General Purpose Timers:

- Five 16-bit and up to two 32-bit Timers/Counters

• Five Output Compare (OC) modules

• Five Input Capture (IC) modules

• Peripheral Pin Select (PPS) to allow function remap

• Real-Time Clock and Calendar (RTCC) module

Core: 100 MHz/131 DMIPS MIPS32 M4K

• MIPS16e

mode for up to 40% smaller code size

• Code-efficient (C and Assembly) architecture

• Single-cycle (MAC) 32x16 and two-cycle 32x32 multiply

Clock Management

•

0.9% internal oscillator

Programmable PLLs and oscillator clock sources

Fail-Safe Clock Monitor (FSCM)

Independent Watchdog Timer

Fast wake-up and start-up

Communication Interfaces

• USB 2.0-compliant Full-speed OTG controller

• Up to five UART modules (20 Mbps):

- LIN 1.2 protocols and IrDA

support

• Two 4-wire SPI modules (25 Mbps)

• Two I

C modules (up to 1 Mbaud) with SMBus support

• PPS to allow function remap

• Parallel Master Port (PMP)

Power Management

• Low-power management modes (Sleep and Idle)

• Integrated Power-on Reset, Brown-out Reset, and High

Voltage Detect

• 0.5 mA/MHz dynamic current (typical)

• 50

μA

current (typical)

Direct Memory Access (DMA)

• Four channels of hardware DMA with automatic data

size detection

• 32-bit Programmable Cyclic Redundancy Check (CRC)

• Two additional channels dedicated to USB

Audio/Graphics/Touch HMI Features

•

External graphics interface with up to 34 PMP pins

Audio data communication: I

S, LJ, RJ, USB

Audio data control interface: SPI and I

C™

Audio data master clock:

- Generation of fractional clock frequencies

- Can be synchronized with USB clock

- Can be tuned in run-time

• Charge Time Measurement Unit (CTMU):

- Supports mTouch™ capacitive touch sensing

- Provides high-resolution time measurement (1 ns)

Input/Output

• 15 mA or 12 mA source/sink for standard V

and

up to 22 mA for non-standard V

OH1

• 5V-tolerant pins

• Selectable open drain, pull-ups, and pull-downs

• External interrupts on all I/O pins

Qualification and Class B Support

• AEC-Q100 REVG (Grade 2 -40ºC to +105ºC) planned

• Class B Safety Library, IEC 60730

Advanced Analog Features

• ADC Module:

- 10-bit 1 Msps rate with one Sample and Hold (S&H)

- Up to 28 analog inputs

- Can operate during Sleep mode

• Flexible and independent ADC trigger sources

• On-chip temperature measurement capability

• Comparators:

- Two dual-input Comparator modules

- Programmable references with 32 voltage points

Debugger Development Support

•

In-circuit and in-application programming

4-wire MIPS

Enhanced JTAG interface

Unlimited program and six complex data breakpoints

IEEE 1149.2-compatible (JTAG) boundary scan

Packages

Type

Pin Count

I/O Pins (up to)

Contact/Lead Pitch

Dimensions

Note:

QFN

0.50

9x9x0.9

0.50

10x10x1

TQFP

100

0.40

12x12x1

100

0.50

14x14x1

VTLA

124

0.50

9x9x0.9

All dimensions are in millimeters (mm) unless specified.



2012-2013 Microchip Technology Inc.

DS60001185C-page 1

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