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PT7V4050GACFA35.328/12.288

Description
PLL/Frequency Synthesis Circuit,
CategoryAnalog mixed-signal IC    The signal circuit   
File Size156KB,7 Pages
ManufacturerDiodes Incorporated
Download Datasheet Parametric View All

PT7V4050GACFA35.328/12.288 Overview

PLL/Frequency Synthesis Circuit,

PT7V4050GACFA35.328/12.288 Parametric

Parameter NameAttribute value
package instructionSON,
Reach Compliance Codecompliant
Analog Integrated Circuits - Other TypesPHASE DETECTOR
JESD-30 codeR-PDSO-N16
length20.32 mm
Number of functions1
Number of terminals16
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeSON
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Maximum seat height4.15 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
Temperature levelCOMMERCIAL
Terminal formNO LEAD
Terminal pitch2.54 mm
Terminal locationDUAL
width10.16 mm
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