PM63C0.2210400 datasheet, PDF - EEWORLD Datasheet

PM63C0.2210400: DescriptionFilm Capacitor, Polyester, 400V, 10% +Tol, 10% -Tol, 0.22uF, Through Hole Mount, AXIAL LEADED; CategoryPassive components capacitor; File Size234KB，1 Pages; ManufacturerEXXELIA Group

Download Datasheet Parametric View All

PM63C0.2210400 Overview

Film Capacitor, Polyester, 400V, 10% +Tol, 10% -Tol, 0.22uF, Through Hole Mount, AXIAL LEADED

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	EXXELIA Group
package instruction	,
Reach Compliance Code	compli
capacitance	0.22 µF
Capacitor type	FILM CAPACITOR
dielectric materials	POLYESTER
Installation features	THROUGH HOLE MOUNT
negative tolerance	10%
Number of terminals	2
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package shape	TUBULAR PACKAGE
positive tolerance	10%
Rated (DC) voltage (URdc)	400 V
surface mount	NO
Terminal shape	WIRE

Breakthrough TI BAW technology advances big data amidst the flood of information: [align=center][color=rgb(85, 85, 85)][font="][size=14px][color=rgb(204, 0, 0)][url=https://e2echina.ti.com/cfs-file/__key/communityserver-blogs-components-weblogfiles/00-00-00-01-15/3302.asasas.jpg][i...; alan000345 TI Technology Forum

7 good habits of PCB layout engineers: In the eyes of some people, the work of PCB layout engineers is a bit boring. Every day, they have to deal with thousands of wiring on the board, various packages, and repeat the work of pulling wires...; mwkjhl PCB Design

High-Speed PCB Design Guidelines: High-Speed PCB Design Guidelines...; fighting PCB Design

Why can't Keil5 return to the original position?: I just started using MDK, and I often use Go to Definition of "xxx" to check the definition source of each function or variable step by step. But after using it frequently, the left return key disappe...; 天涯海角sr stm32/stm8

The operator "===" or "!==" in Verilog cannot be synthesized: The operators "===" or "!==" in Verilog cannot be synthesized , but what should I do if I cannot modify them to "==" or "!="? I still want to synthesize successfully....; gjgd FPGA/CPLD

Shortcut: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

Popular Components