TRU050-GDLHA-61M4400000 datasheet, PDF

Datasheet> All Categories > Analog mixed-signal IC> The signal circuit> TRU050-GDLHA-61M4400000

TRU050-GDLHA-61M4400000: DescriptionPhase Locked Loop, CDSO16, SMD-16; CategoryAnalog mixed-signal IC The signal circuit; File Size427KB，14 Pages; ManufacturerMicrosemi; Websitehttps://www.microsemi.com; Environmental Compliance

Download Datasheet Parametric View All

TRU050-GDLHA-61M4400000 Overview

Phase Locked Loop, CDSO16, SMD-16

TRU050-GDLHA-61M4400000 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Microsemi
package instruction	SMD-16
Reach Compliance Code	compli
Analog Integrated Circuits - Other Types	PHASE LOCKED LOOP
JESD-30 code	R-CDSO-G16
JESD-609 code	e4
length	20.32 mm
Humidity sensitivity level	1
Number of functions	1
Number of terminals	16
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
Maximum seat height	4.69 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
Temperature level	INDUSTRIAL
Terminal surface	Gold (Au) - with Nickel (Ni) barrie
Terminal form	GULL WING
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	40
width	7.88 mm

Preview

Download Datasheet

View All

TRU050

Complete VCXO based Phase-Locked Loop

Features

•

Output Frequencies to 65.536 MHz

•

5.0 V or 3.3Vdc Operation

•

Tri-State Output

•

Holdover on Loss of Signal Alarm

•

VCXO with CMOS Outputs

•

0/70° or –40/85° Temperature Range

•

Ceramic SMD Package

•

RoHS/Lead Free Compliant Versions

The TRU050, VCXO based PLL

Description

The VI TRU050 is a user-configurable crystal-based

PLL integrated circuit. It includes a digital phase

detector, op-amp, VCXO and additional integrated

functions for use in digital synchronization

applications. Loop filter software is available as well

SPICE models for circuit simulation.

Applications

•

Frequency Translation

•

Clock Smoothing

•

NRZ Clock Recovery

•

DSLAM, ADM, ATM, Aggregation, Optical

Switching/Routing, Base Station

•

Low Jitter PLL’s

Figure 1. TRU050 Block Diagram

Vectron International, 267 Lowell Rd, Unit 102, Hudson NH 03051-4916

Page 1 of 14

Tel: 1-88-VECTRON-1

•

Web:

www.vectron.com

Rev:

4/12/2016

TRU050, VCXO Based PLL

TRU050 Theory of Operation

Phase Detector

The phase detector has two buffered inputs, DATAIN and CLKIN, which are designed to switch at 1.4 volts.

DATAIN is designed to accept an NRZ data stream but may also be used for clock signals which have about a

50% duty cycle. CLKIN is connected to OUT1 or OUT2, or a divided version of one of these outputs. CLKIN

and DATAIN and are protected by ESD diodes and should not exceed the power supply voltage or ground by

more than a few hundred millivolts.

The phase detector is basically a latched flip flop/exclusive-or gate/differential amplifier filter design to produce

a DC signal proportional to the phase between the CLKIN and DATAIN signals, see figure 4 for a block

diagram and figure 5 for a open loop transfer curve. This simplies the PLL design as the designer does not

have to filter narrow pulse signal to a DC level. Under locked conditions the rising edge CLKIN will be centered

in the middle of the DATAIN signal, see figure 6.

The phase detector gain is 0.53V/rad x data density for 5volt operation, and 0.35V/rad x data density for 3.3

volt operation. Data density = 1.0 for clock signals and is system dependent on coding and design for NRZ

signals, but 0.25 could be used as a starting point for data density.

The phase detector output is a DC signal for DATAIN frequencies greater than 1MHz but produces signficant

ripple when inputs are less than 200kHz. Additional filtering is required for low input frequency applications

such as 8kHz frequency translation, see figures 8 and 9.

Under closed loop conditions the active filter has a blocking capacitor which provides a very high DC gain, so

under normal locked conditions and input frequencies >1MHz, PHO will be about V

/2 and will not vary

signifigantly with changes in input frequency (within lock range). The control (voltage pin 1) will vary according

to the input frequency offset, but PHO will remain relatively constant.

Data In

(pin 7)

Clock In

(pin 9)

30 kΩ

20 kΩ

PHO

(pin 6)

Gain = 5 V / 2π

Gain = 2 / 3

Figure 4. Simplified Phase Detector Block Diagram

Vectron International, 267 Lowell Rd, Unit 102, Hudson NH 03051-4916

Page 4 of 14

Tel: 1-88-VECTRON-1

•

Web:

www.vectron.com

Rev:

4/12/2016

Recommended Resources

Chicken farm photoelectric control circuit

Voltage controlled oscillator circuit with differential input

Simple voltage type low voltage electric shock safety device circuit diagram

555 kinds of signal generator circuits

SAFl039P (TV, audio equipment and industrial control equipment) infrared remote control receiving and decoding circuit

The voltage stabilization principle of the output voltage stabilizing circuit

Miniaturized millimeter wave sensors using CMOS technology: Most commercial radar systems, especially those in advanced driver assistance systems (ADAS), are based on silicon germanium (SiGe) technology. Today’s high-end vehicles have a multi-chip SiGe radar s...; fish001 Microcontroller MCU

What is the motor principle corresponding to the STM measurement of the motor's electrical angle?: ST FOC Motor Library Electrical Angle Convention ( STM32 PMSM FOC SDK Motor Control Firmware Library ) By default, the highest point of the back electromotive force of phase A of the motor is taken as...; long521 stm32/stm8

Audio Amplifier Distortion and Common Improvement Methods: [size=4][color=#000000][backcolor=white] Frequency amplifier distortion refers to the phenomenon of waveform distortion of the reproduced audio signal, which is usually divided into two categories: el...; Aguilera Analogue and Mixed Signal

Several standards for selecting splicing screens: LED display screens are now widely used in large shopping malls, airports, railway stations and the financial industry. The large demand has led to a lot of defective displays in the market. Due to th...; chao520858 Security Electronics

LM46002AQ: Has anyone used this power chip (LM46002AQPWPR)? The design is to output 12V (input wide voltage 3.9-24V). Now it is measured that no matter how much the input is, the output is about 4V, and the FB p...; xxhhzz Power technology

[TI millimeter wave radar evaluation]_1_AWR1843BOOST unboxing: [i=s]This post was last edited by lbbook on 2019-12-9 23:23[/i]Thanks to TI and EEworld team for organizing the mmWave development board evaluation event. I am very lucky to be qualified to evaluate A...; lbbook TI Technology Forum

Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

Popular Components