FTS512K8L-70JMB datasheet, PDF

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FTS512K8L-70JMB: DescriptionStandard SRAM, 512KX8, 70ns, CMOS, 0.400 INCH, SOJ-36; Categorystorage storage; File Size525KB，12 Pages; ManufacturerForce Technologies Ltd.

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FTS512K8L-70JMB Overview

Standard SRAM, 512KX8, 70ns, CMOS, 0.400 INCH, SOJ-36

FTS512K8L-70JMB Parametric

Parameter Name	Attribute value
Maker	Force Technologies Ltd.
Parts packaging code	SOJ
package instruction	SOJ,
Contacts	36
Reach Compliance Code	compli
ECCN code	3A001.A.2.C
Maximum access time	70 ns
JESD-30 code	R-XDSO-J36
length	23.495 mm
memory density	4194304 bi
Memory IC Type	STANDARD SRAM
memory width	8
Number of functions	1
Number of terminals	36
word count	524288 words
character code	512000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	512KX8
Package body material	UNSPECIFIED
encapsulated code	SOJ
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Parallel/Serial	PARALLEL
Certification status	Not Qualified
Filter level	MIL-STD-883
Maximum seat height	3.683 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	DUAL
width	10.16 mm

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FTS512K8/FTS512K8L

HIGH SPEED 512K x 8

STATIC CMOS RAM

FEATURES

High Speed (Equal Access and Cycle Times)

— 15/20/25 ns (Commercial)

— 20/25/35 ns (Industrial)

— 20/25/35/45/55/70 ns (Military)

Low Power

Single 5V±10% Power Supply

Easy Memory Expansion Using

and

Inputs

Common Data I/O

Three-State Outputs

Fully TTL Compatible Inputs and Outputs

Advanced CMOS Technology

Automatic Power Down

Packages

—36-Pin SOJ (400 mil)

—36-Pin FLATPACK

—36-Pin LCC (452 mil x 920 mil)

DESCRIPTION

The FTS512K8 is a 4 Megabit high-speed CMOS

static RAM organised as 512Kx8. The CMOS memory

requires no clocks or refreshing, and has equal access

and cycle times. Inputs are fully TTL-compatible. The

RAM operates from a single 5V±10% tolerance power

supply.

Access times as fast as 15 nanoseconds permit greatly

enhanced system operating speeds. CMOS is utilised

to reduce power consumption to a low level. The FTS512K8

is a member of a family of Force Ram's products offer-

ing fast access times.

The FTS512K8 device provides asynchronous operation

with matching access and cycle times. Memory loca-

tions are specified on address pins A

to A

. Reading is

accomplished by device selection (CE) and output en-

abling (OE) while write enable (WE) remains HIGH. By

presenting the address under these conditions, the data

in the addressed memory location is presented on the

data input/output pins. The input/output pins stay in the

HIGH Z state when either

is HIGH or

LOW.

FUNCTIONAL BLOCK DIAGRAM

PIN CONFIGURATIONS

SOLDER-SEAL

FLATPACK (FS-4),

SOJ (J9, CJ2)

LCC (L11)

1519B

REV 1

1/12

2008

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