MLCK-67142L-70 datasheet, PDF - EEWORLD Datasheet

MLCK-67142L-70: DescriptionMulti-Port SRAM, 2KX8, 70ns, CMOS, CDIP48,; Categorystorage storage; File Size746KB，14 Pages; ManufacturerTEMIC; Websitehttp://www.temic.de/

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MLCK-67142L-70 Overview

Multi-Port SRAM, 2KX8, 70ns, CMOS, CDIP48,

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	TEMIC
Reach Compliance Code	unknown
Maximum access time	70 ns
I/O type	COMMON
JESD-30 code	R-XDIP-T48
JESD-609 code	e0
memory density	16384 bit
Memory IC Type	MULTI-PORT SRAM
memory width	8
Number of ports	2
Number of terminals	48
word count	2048 words
character code	2000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	2KX8
Output characteristics	3-STATE
Package body material	CERAMIC
encapsulated code	DIP
Encapsulate equivalent code	DIP48,.6
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
power supply	3.3 V
Certification status	Not Qualified
Maximum standby current	0.00002 A
Minimum standby current	2 V
Maximum slew rate	0.08 mA
Nominal supply voltage (Vsup)	3.3 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL

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