PUMA67E4001BM-15E datasheet, PDF

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PUMA67E4001BM-15E: DescriptionEEPROM Module, 128KX32, 150ns, Parallel, CMOS, CQMA68, CERAMIC, LCC-68; Categorystorage storage; File Size236KB，15 Pages; ManufacturerAPTA Group Inc

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PUMA67E4001BM-15E Overview

EEPROM Module, 128KX32, 150ns, Parallel, CMOS, CQMA68, CERAMIC, LCC-68

PUMA67E4001BM-15E Parametric

Parameter Name	Attribute value
Maker	APTA Group Inc
Parts packaging code	QMA
package instruction	,
Contacts	68
Reach Compliance Code	unknown
ECCN code	3A001.A.2.C
Maximum access time	150 ns
Other features	CAN ALSO BE CONFIGURED AS 512K X 8
Spare memory width	16
JESD-30 code	S-CQMA-J68
memory density	4194304 bit
Memory IC Type	EEPROM MODULE
memory width	32
Number of functions	1
Number of terminals	68
word count	131072 words
character code	128000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	128KX32
Package body material	CERAMIC, METAL-SEALED COFIRED
Package shape	SQUARE
Package form	MICROELECTRONIC ASSEMBLY
Parallel/Serial	PARALLEL
Programming voltage	5 V
Certification status	Not Qualified
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal form	J BEND
Terminal location	QUAD
Maximum write cycle time (tWC)	10 ms

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128K x 32 EEPROM Module

PUMA 2/67E4001/A/B -12/15/20

Elm Road, West Chirton, North Shields, Tyne & Wear

NE29 8SE, England Tel. +44 (0191) 2930500 Fax. +44 (0191) 2590997

Issue 4.3 : January 2001

Description

Available in PGA (Puma 2), and JLCC (Puma 67)

footprints, the Puma **E4001 is a 4 Mbit EEPROM

module user configurable as 128K x 32, 256K x 16

or 512K x 8. Available with access times of 120, 150

and 200ns, the device features hardware and software

data protection, 10,000 cycle Write/Erase capability

and 10 year data retention time.

Several pinout variants of the PUMA67 are available

including single and multiple WE variants.

Parts may be screened in accordance with MIL-STD-

883

Features

• 4 Megabit EEPROM module.

• Access Times of 120/150/200 ns.

• Output Configurable as 32/ 16/ 8 bit wide.

• Upgradeable footprint

• Operating Power 1600/ 830/ 445 mW (Max).

Low Power Standby

2.2 mW (Max).

• Byte and Page Write (128 Bytes) in 5ms typical with

DATA Polling and Toggle bit indication of end of

Write.

• Hardware and Software Data Protection.

• Puma 2 - 66 pin Ceramic PGA.

• Puma 67 - 68 Lead Ceramic JLCC.

• May be screened in accordance with MIL-STD-883.

• 100,000 W/E cycle endurance option

Block Diagram

PUMA 2E4001, 67E4001A and 67E4001B

Block Diagram

PUMA 67E4001A/B

A0~A16

WE4

WE3

WE2

WE1

A0~A16

128K x 8

EEPROM

128K x 8

EEPROM

128K x 8

EEPROM

128K x 8

EEPROM

CS1

CS2

CS3

CS4

D0~7

D8~15

D16~23

D24~31

128K x 8

EEPROM

128K x 8

EEPROM

128K x 8

EEPROM

128K x 8

EEPROM

CS1

CS2

CS3

CS4

D0~7

D8~15

D16~23

D24~31

Pin Functions

A0~A16

CS1~4

GND

Address Input

Chip Select

Output Enable

Ground

D0~D31

WE1~4

Vcc

Data Inputs/Outputs

Write Enables

Power (+5V)

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