(leiizu ^E.mi-C-ondu.cko'i O^ioaueti, Una.
CX
!_/
20 STERN AVE.
SPRINGFIELD, NEW JERSEY 07081
U.S.A.
TELEPHONE: (973) 376-2922
(212)227-6005
BF506
FAX: (973) 376-8960
SILICON PLANAR PNP
VHP OSCILLATOR MIXER
The BF 506 is a silicon planar epitaxial PNP transistor in Jedec TO-92 plastic package.
It is intended for use as mixer and oscillator in the VHP range. However, it may also be
used as not controlled preamplifier at low noise.
ABSOLUTE MAXIMUM RATINGS
VCBO
VCEO
VEBO
'c
IB
Ptot
Collector-base voltage (I
E
=0)
Collector-emitter voltage (I
B
=0)
Emitter-base voltage (l
c
= 0)
Collector current
Base current
Total power dissipation at T,
mb
< 45°C
Storage temperature
Junction temperature
-40
-35
-4
-30
-5
250
-55 to 150
150
V
V
V
mA
mA
mW
°C
°C
(DIM
4)
"— SEATING PLANE
NJ Semi-Conductors reserves the right to change test conditions, parameter limits and package dimensions without
notice. Information furnished by NJ Semi-Conductors is believed to be both accurate and reliable at the time of going
to press. However, NJ Semi-Conductors assumes no responsibility for any errors or omissions discovered in its use.
NJ Semi-Conductors encourages customers to verify that datasheets are current before placing orders.
Quality Semi-Conductors
BF506
THERMAL DATA
Thermal resistance junction-ambient
max
420 °C/W
ELECTRICAL CHARACTERISTICS
(T
amb
= 25°C unless otherwise specified)
Parameter
ICBO
Collector cutoff
current
(I
E
=0)
Test conditions
Win. Typ. Max Unit
-200
V
CB
= -20V
nA
V(BR)CEO Collector-emitter
breakdown voltage
(I
B
=0)
VJBRJEBO Emitter-base
breakdown voltage
(l
c
=0)
h
F£
fr
CCBO
DC current gain
Transition frequency
Collector-base
capacitance
Reverse capacitance
Noise figure
l
c
= -5 mA
-35
V
I
E
--10 //A
l
c
= -3 mA
l
c
=-1 mA
f = 100 MHz
I
E
=0
f = 1 MHz
l
c
=0
f = 1 MHz
l
c
= -1 mA
R
g
= 50 n
f = 200 MHz
l
c
=-3mA
R
L
= 1kn
f = 200 MHz
V
CE
= -10V
V
CE
=-10V
-4
V
40
-
400
MHz
V
CB
=-10V
0.8
pF
C
rb
NF*/**
V
CB
=-10V
0.13
V
cc
= -6V
2.5
V
cc
= -10.8V
14
17
dB
pF
4
dB
G
pb
*
Power gain
* See TEST CIRCUIT
** Input adapting for optimum source admittance
PCB Design
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