EEWORLDEEWORLDEEWORLD

Part Number

Search

ASFLT-A-40.0000MHZ-R7

Description
CMOS Output Clock Oscillator, 40MHz Nom, ROHS COMPLIANT PACKAGE-4
CategoryPassive components    oscillator   
File Size780KB,2 Pages
ManufacturerAbracon
Websitehttp://www.abracon.com/index.htm
Environmental Compliance  
Download Datasheet Parametric View All

ASFLT-A-40.0000MHZ-R7 Overview

CMOS Output Clock Oscillator, 40MHz Nom, ROHS COMPLIANT PACKAGE-4

ASFLT-A-40.0000MHZ-R7 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerAbracon
package instructionROHS COMPLIANT PACKAGE-4
Reach Compliance Codecompliant
Other featuresTRI-STATE FUNCTION; BULK
maximum descent time5 ns
Frequency Adjustment - MechanicalNO
frequency stability7%
Manufacturer's serial numberASFLT
Installation featuresSURFACE MOUNT
Nominal operating frequency40 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeCMOS
Output load15 pF
physical size5.0mm x 3.2mm x 1.05mm
longest rise time5 ns
Maximum supply voltage2.97 V
Minimum supply voltage2.43 V
Nominal supply voltage2.7 V
surface mountYES
maximum symmetry45/55 %
TIGHT STABILITY INDUSTRIAL GRADE
CRYSTAL OSCILLATOR
ASFLT SERIES
FEATURES:
• Highly reliable seam-sealed package
• Low current consumption
• Low phase noise and jitter
• Industrial grade tight temperature stability (±5.0ppm / -40 to +85
°
C)
• Fast start-up time
• CMOS output with Tri-state function
Pb
APPLICATIONS:
RoHS
Compliant
5.0 x 3.2 x 1.05mm
| | | | | | | | | | | | | | |
• Home networking by AC socket
• Wireless LAN
• Mobile communications
• PLC modem
• WiMax
STANDARD SPECIFICATIONS:
PARAMETERS
ABR AC O N P /N:
Frequency:
Standard Frequencies:
Output level:
Operating temperature:
Storage temperature:
Overall Frequency Stability*:
Supply voltage (Vdd):
Supply current (Idd):
Stand-by current:
Symmetry:
Rise and Fall Times(Tr/Tf):
Start-up time:
Output load:
Output Voltage:
Aging @ 25ºC:
Phase Noise (@ 10kHz offset):
Jitter:
AS F LT S e rie s
4.000MHz to 54.000MHz
5, 10, 12, 16, 16.384, 19.44, 20, 24, 25, 26, 32, 40, 44MHz
CMOS
- 40°C to +85°C
- 40°C to +85°C
±15ppm (see option)
3.0Vdc ± 10% (see option)
7mA max.
10µA max.
45/55 % @ 50% Vdd
5ns max. / 10%Vdd-90%Vdd
0.2ms typical, 3ms max.
15pF max.
VOH = 0.9*Vdd min.
VOL = 0.1*Vdd max.
±2 ppm/ first year, ±7 ppm/ 10 years
-143dBc/Hz Typ.
1? 3ps typ.
* Overall frequency stability includes initial tolerance @ +25˚
C, and temperature stability.
OPTIONS AND PART IDENTIFICATION:
(Left blank if standard)
ASFLT -
- Frequency -
-
P /N a n d
Bla n k
A
B
C
D
Vd d (V)
3 .0 ±1 0 %
2 . 7 ±1 0 %
3 . 3 ±1 0 %
2 . 8 ±1 0 %
2.5±10%
Frequency
XX.XXXX MHz
Freq. Stability
Bla n k
±1 5 p p m
Y
±1 0 p p m
R7*
±7 p p m
R5*
±5 p p m
* Contact ABRACON for availability
P a c k a g in g
Bla n k
Bu lk
Tape and
T
Reel
ABRACON IS
ABRACON
ISO9001:2008
CERTIFIED
CERTIFIED
Revised 10.09.10
30332 Esperanza, Rancho Santa Margarita, California
92688
tel 949-546-8000| fax 949-546-8001
www.abracon.com
|
Visit
www.abracon.com
for Terms & Conditions of Sale
Record - Implementing USB virtual serial port on STM32 based on RTT
I will record the process of implementing the USB virtual serial port on the Zhengdian Atom F429 Apollo development board, hoping to help others who want to learn USB.First, I updated the source code ...
Fillmore Embedded System
02_Using Quartus II Timequest Timing Analyzer Constraint Analysis Design.zip
02_Using Quartus II Timequest Timing Analyzer Constraint Analysis Design.zip...
雷北城 FPGA/CPLD
UCS clock system of MSP430F6638
Five clock sources and three clock signals 【Note】DCOCLKDIV clock is obtained by dividing DCOCLK...
火辣西米秀 Microcontroller MCU
Playing with Zynq Serial 48——[ex67] Vivado FFT and IFFT IP core application examples
1 About Fourier TransformThe Fourier transform is such a magical transform, its basic principles and applications are everywhere in textbooks and on the Internet, so I will not go into details here to...
ove学习使我快乐 FPGA/CPLD
How to distinguish between voltage series negative feedback circuit and current series negative feedback circuit
The negative feedback amplifier circuit can be divided into voltage feedback and current feedback from the sampling method of the output end, and can be divided into series feedback and parallel feedb...
Jacktang Analogue and Mixed Signal
Multifunctional open source custom macro keyboard
[i=s]This post was last edited by qwert1213131 on 2022-10-22 20:21[/i]1. Introduction of the work (100-200 words) Multifunctional open source custom macro keyboardMost macro keyboards on the market re...
qwert1213131 DigiKey Technology Zone

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号