AP101C182JQU2A datasheet, PDF - EEWORLD Datasheet

AP101C182JQU2A: DescriptionCeramic Capacitor, Multilayer, Ceramic, 100V, 5% +Tol, 5% -Tol, X7R, 15% TC, 0.0018uF, Surface Mount, 1210, CHIP, ROHS COMPLIANT; CategoryPassive components capacitor; File Size145KB，3 Pages; ManufacturerAVX; Environmental Compliance

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AP101C182JQU2A Overview

Ceramic Capacitor, Multilayer, Ceramic, 100V, 5% +Tol, 5% -Tol, X7R, 15% TC, 0.0018uF, Surface Mount, 1210, CHIP, ROHS COMPLIANT

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Objectid	1869808274
package instruction	, 1210
Reach Compliance Code	compliant
Country Of Origin	UK
ECCN code	EAR99
YTEOL	7.83
capacitance	0.0018 µF
Capacitor type	CERAMIC CAPACITOR
dielectric materials	CERAMIC
high	1.02 mm
length	3.2 mm
Manufacturer's serial number	APS
Installation features	SURFACE MOUNT
multi-layer	Yes
negative tolerance	5%
Number of terminals	2
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package shape	RECTANGULAR PACKAGE
Package form	SMT
method of packing	TR, EMBOSSED, 7 INCH
positive tolerance	5%
Rated (DC) voltage (URdc)	100 V
Guideline	AEC-Q200
series	APS
size code	1210
surface mount	YES
Temperature characteristic code	X7R
Temperature Coefficient	15% ppm/°C
Terminal shape	WRAPAROUND
width	2.5 mm

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