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HA1-5340-9

Description
Sample and Hold Circuit, 1 Func, Sample, 0.7us Acquisition Time, CDIP14
CategoryAnalog mixed-signal IC    Amplifier circuit   
File Size324KB,8 Pages
ManufacturerHarris
Websitehttp://www.harris.com/
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HA1-5340-9 Overview

Sample and Hold Circuit, 1 Func, Sample, 0.7us Acquisition Time, CDIP14

HA1-5340-9 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerHarris
package instructionDIP, DIP14,.3
Reach Compliance Codeunknown
ECCN codeEAR99
Maximum acquisition time0.9 µs
Nominal acquisition time0.7 µs
Amplifier typeSAMPLE AND HOLD CIRCUIT
Maximum analog input voltage10 V
Minimum analog input voltage-10 V
maximum rate of descent95 V/s
JESD-30 codeR-GDIP-T14
JESD-609 codee0
Negative supply voltage upper limit-18 V
Nominal Negative Supply Voltage (Vsup)-15 V
Number of functions1
Number of terminals14
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialCERAMIC, GLASS-SEALED
encapsulated codeDIP
Encapsulate equivalent codeDIP14,.3
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply+-15 V
Certification statusNot Qualified
Sample and hold/Track and holdSAMPLE
Maximum slew rate25 mA
Supply voltage upper limit18 V
Nominal supply voltage (Vsup)15 V
surface mountNO
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED

HA1-5340-9 Preview

S E M I C O N D U C T O R
HA-5340
700ns, Low Distortion, Precision
Sample and Hold Amplifier
Description
The HA-5340 combines the advantages of two sample/ hold
architectures to create a new generation of monolithic
sample/hold. High amplitude, high frequency signals can be
sampled with very low distortion being introduced. The
combination of exceptionally fast acquisition time and
specified/characterized hold mode distortion is an industry
first. Additionally, the AC performance is only minimally
affected by additional hold capacitance.
To achieve this level of performance, the benefits of an
integrating output stage have been combined with the advan-
tages of a buffered hold capacitor. To the user this translates
to a front-end stage that has high bandwidth due to charging
only a small capacitive load and an output stage with constant
pedestal error which can be nulled out using the offset adjust
pins. Since the performance penalty for additional hold capac-
itance is low, the designer can further minimize pedestal error
and droop rate without sacrificing speed.
Low distortion, fast acquisition, and low droop rate are the
result, making the HA-5340 the obvious choice for high
speed, high accuracy sampling systems.
November 1996
Features
• Fast Acquisition Time (0.01%) . . . . . . . . . . . . . . . 700ns
• Fast Hold Mode Settling Time (0.01%) . . . . . . . . . . 200n
• Low Distortion (Hold Mode) . . . . . . . . . . . . . . . . -72dBc
• (V
IN
= 200kHz, f
S
= 450kHz, 5V
P-P
)
• Bandwidth Minimally Affected By External C
H
• Fully Differential Analog Inputs
• Built-In 135pF Hold Capacitor
• Pin Compatible with HA-5320
Applications
• High Bandwidth Precision Data Acquisition Systems
• Inertial Navigation and Guidance Systems
• Ultrasonics
• SONAR
• RADAR
Pinouts
HA-5340
(PDIP, CERDIP)
TOP VIEW
For a Military temperature range version request the
HA-5340/883 data sheet.
Ordering Information
PART NUMBER
HA1-5340-5
HA1-5340-9
HA3-5340-5
HA3-5340-9
HA9P5340-5
TEMP.
RANGE (
o
C)
PACKAGE
0 to 75
14 Ld CERDIP
-40 to 85
0 to 75
-40 to 85
0 to 75
14 Ld CERDIP
14 Ld PDIP
14 Ld PDIP
16 Ld SOIC
PKG.
NO.
F14.3
F14.3
E14.3
E14.3
M16.3
-IN 1
+IN 2
OFFSET ADJ. 3
OFFSET ADJ. 4
V- 5
SIG. GND 6
OUTPUT 7
14 S/H CONTROL
13 SUPPLY GND
12 NC
11 EXTERNAL
HOLD CAP.
10 NC
9 V+
8 NC
Functional Diagram
ADJUST OFFSET
C
HOLD EXTERNAL
(OPTIONAL)
HA-5340
(SOIC)
TOP VIEW
-IN 1
+IN 2
OFFSET ADJ. 3
OFFSET ADJ. 4
NC 5
V- 6
SIG. GND 7
OUTPUT 8
16 S/H CONTROL
15 SUPPLY GND
14 NC
13 NC
EXTERNAL
12 HOLD CAP.
11 NC
10 NC
9 V+
-IN
+IN
S/H
CONTROL
3
4
11
7
C
HOLD
120pF
1
2
14
9
V+
5
V-
13
6
C
COMP
15pF
7
OUT
SUPPLY SIGNAL GND
GND
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
©
Harris Corporation 1996
File Number
2859.2
5-24
HA-5340
Absolute Maximum Ratings
Voltage Between V+ and V- Terminals . . . . . . . . . . . . . . . . . . . . 36V
Differential Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24V
Digital Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+8V, -6V
Output Current, Continuous . . . . . . . . . . . . . . . . . . . . . . . . .
±20mA
Thermal Information
Thermal Resistance (Typical, Note 2)
θ
JA
(
o
C/W)
θ
JC
(
o
C/W)
CERDIP Package . . . . . . . . . . . . . . . .
66
16
PDIP Package . . . . . . . . . . . . . . . . . . .
90
N/A
SOIC Package . . . . . . . . . . . . . . . . . . .
95
N/A
Maximum Junction Temperature (Ceramic Package, Note 1) . . . 175
o
C
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
Operating Conditions
Temperature Range
HA-5340-9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40
o
C to 85
o
C
HA-5340-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0
o
C to 75
o
C
Supply Voltage Range (Typical) . . . . . . . . . . . . . . . . .
±12V
to
±18V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Maximum power dissipation must be designed to maintain the junction temperature below 175
o
C for the ceramic package, and below
150
o
C for the plastic packages.
2.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
V
SUPPLY
=
±15.0V;
C
H
= Internal = 135pF; Digital Input: V
IL
= +0.8V (Sample), V
IH
= +2.0V (Hold). Non-Inverting
Unity Gain Configuration (Output tied to -Input), R
L
= 2kΩ, C
L
= 60pF, Unless Otherwise Specified
HA-5340-9, HA-5340-5
PARAMETER
INPUT CHARACTERISTICS
Input Voltage Range
Input Resistance (Note 3)
Input Capacitance
Input Offset Voltage
TEST CONDITIONS
TEMP. (
o
C)
MIN
TYP
MAX
UNITS
Full
25
25
25
Full
-10
-
-
-
-
-
-
-
-
-
-10
-
72
-
1
-
-
-
-
±70
-
±50
-
-
83
-
+10
-
3
1.5
3.0
30
-
±350
-
±350
+10
-
-
V
MΩ
pF
mV
mV
µV/
o
C
nA
nA
nA
nA
V
dB
dB
Offset Voltage Temperature Coefficient
Bias Current
Full
25
Full
Offset Current
25
Full
Common Mode Range
CMRR
±10V,
Note 4
Full
25
Full
TRANSFER CHARACTERISTICS
Gain
Gain Bandwidth Product
DC
C
H
External = 0pF
C
H
External = 100pF
C
H
External = 1000pF
TRANSIENT RESPONSE
Rise Time
Overshoot
Slew Rate
DIGITAL INPUT CHARACTERISTICS
Input Voltage
V
IH
V
IL
Input Current
V
IL
= 0V
V
IH
= 5V
Full
Full
Full
Full
2.0
-
-
-
-
-
7
4
-
0.8
40
40
V
V
µA
µA
200mV Step
200mV Step
10V Step
25
25
25
-
-
40
20
35
60
30
50
-
ns
%
V/µs
25
Full
Full
Full
110
-
-
-
140
10
9.6
6.7
-
-
-
-
dB
MHz
MHz
MHz
5-25
HA-5340
Electrical Specifications
V
SUPPLY
=
±15.0V;
C
H
= Internal = 135pF; Digital Input: V
IL
= +0.8V (Sample), V
IH
= +2.0V (Hold). Non-Inverting
Unity Gain Configuration (Output tied to -Input), R
L
= 2kΩ, C
L
= 60pF, Unless Otherwise Specified
(Continued)
HA-5340-9, HA-5340-5
PARAMETER
OUTPUT CHARACTERISTICS
Output Voltage
Output Current
Full Power Bandwidth (Note 5)
Output Resistance
Hold Mode
Full
Full
Full
25
Full
Total Output Noise
DC to 10MHz
DISTORTION CHARACTERISTICS
SAMPLE MODE
Signal to Noise Ratio
(RMS Signal to RMS Noise)
Total Harmonic Distortion
V
IN
= 200kHz, 20V
P-P
V
IN
= 200kHz, 5V
P-P
V
IN
= 200kHz, 10V
P-P
V
IN
= 200kHz, 20V
P-P
V
IN
= 500kHz, 5V
P-P
Intermodulation Distortion
HOLD MODE (50% Duty Cycle S/H)
Signal to Noise Ratio (RMS Signal to
RMS Noise)
f
S
= 450kHz
Total Harmonic Distortion
f
S
= 450kHz
V
IN
= 10V
P-P
, f
1
= 20kHz,
f
2
= 21kHz
Full
Full
Full
Full
Full
Full
-
-90
-76
-70
-66
-78
115
-100
-82
-74
-75
-83
-
-
-
-
-
-
dB
dBc
dBc
dBc
dBc
dBc
Sample Mode
Hold Mode
25
25
-10
-10
0.6
-
-
-
-
-
-
0.9
0.05
0.07
325
325
+10
+10
-
0.1
0.15
400
400
V
mA
MHz
µV
RMS
µV
RMS
TEST CONDITIONS
TEMP. (
o
C)
MIN
TYP
MAX
UNITS
V
IN
= 200kHz, 5V
P-P
V
IN
= 200kHz, 10V
P-P
V
IN
= 200kHz, 5V
P-P
V
IN
= 200kHz, 10V
P-P
V
IN
= 200kHz, 20V
P-P
25
25
25
25
25
25
25
25
25
25
25
25
-
-
-
-
-
-
-
-
-
-
-
-
76
76
-72
-66
-56
-84
-71
-61
-95
-91
-82
-79
-
-
-
-
-
-
-
-
-
-
-
-
dB
dB
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
f
S
= 450kHz
V
IN
= 100kHz, 5V
P-P
V
IN
= 100kHz, 10V
P-P
V
IN
= 100kHz, 20V
P-P
f
S
= 2f
IN
(Nyquist)
V
IN
= 20kHz, 5V
P-P
V
IN
= 50kHz, 5V
P-P
V
IN
= 100kHz, 5V
P-P
Intermodulation Distortion
f
S
= 450kHz
V
IN
= 10V
P-P
(f
1
= 20kHz, f
2
= 21kHz)
10V Step to 0.01%
SAMPLE AND HOLD CHARACTERISTICS
Acquisition Time
25
Full
10V Step to 0.1%
Droop Rate
C
H
= Internal
V
IL
= 0V, V
IH
= 4.0V, t
R
= 5ns
To
±1mV
20V
P-P
, 200kHz, Sine
25
25
Full
Hold Step Error
Hold Mode Settling Time
Hold Mode Feedthrough
EADT (Effective Aperture Delay Time)
25
Full
Full
25
-
-
-
-
-
-
-
-
-
700
-
430
0.1
-
15
200
-76
-15
-
900
600
-
95
-
300
-
-
ns
ns
ns
µV/µs
µV/µs
mV
ns
dB
ns
5-26
HA-5340
Electrical Specifications
V
SUPPLY
=
±15.0V;
C
H
= Internal = 135pF; Digital Input: V
IL
= +0.8V (Sample), V
IH
= +2.0V (Hold). Non-Inverting
Unity Gain Configuration (Output tied to -Input), R
L
= 2kΩ, C
L
= 60pF, Unless Otherwise Specified
(Continued)
HA-5340-9, HA-5340-5
PARAMETER
Aperture Uncertainty
POWER SUPPLY CHARACTERISTICS
Positive Supply Current
Negative Supply Current
PSRR
NOTES:
3. Derived from Computer Simulation only, not tested.
4. +CMRR is measured from 0V to +10V, -CMRR is measured from 0V to -10V.
5. Based on the calculation FPBW = Slew Rate/2πV
PEAK
(V
PEAK
= 10V).
10% Delta
Full
Full
Full
-
-
75
19
19
82
25
25
-
mA
mA
dB
TEST CONDITIONS
TEMP. (
o
C)
25
MIN
-
TYP
0.2
MAX
-
UNITS
ns
Test Circuits and Waveforms
1
2
S/H
CONTROL
INPUT
14
-INPUT
+INPUT
S/H CONTROL
HA-5340
(C
H
= 135pF = INTERNAL)
11
NC
OUTPUT
7
V
O
FIGURE 1. HOLD STEP ERROR AND DROOP RATE
S/H CONTROL
HOLD (+4.0V)
SAMPLE (0V)
S/H CONTROL
HOLD (+4.0V)
SAMPLE (0V)
V
O
∆t
∆V
O
V
O
NOTES:
7. Observe the voltage “droop”,
∆V
O
/∆t.
V
P
8. Measure the slope of the output during hold,
∆V
O
/∆t.
9. Droop can be positive or negative - usually to one rail or the other
not to GND.
FIGURE 3. DROOP RATE TEST
NOTE:
6. Observe the “hold step” voltage V
P.
FIGURE 2. HOLD STEP ERROR
V+
ANALOG
MUX OR
SWITCH
1
20V
P-P
200kHz
SINE WAVE
A
IN
S/H CONTROL
INPUT
2
-IN
+IN
SUPPLY
GND
13
TO
SUPPLY
COMMON
HA-5340
V-
NOTE:
9
5
V
OUT
OUT
REF
COM
6
TO
SIGNAL
GND
7
V IN
10. Feedthrough in
V
OUT
-
dB
=
20 log
--------------
where:
V
IN
V
OUT
= V
P-P
, Hold Mode,
V
IN
= V
P-P
14 S/H
CONTROL
FIGURE 4. HOLD MODE FEED THROUGH ATTENUATION
5-27
HA-5340
Application Information
The HA-5340 has the uncommitted differential inputs of an op
amp, allowing the Sample and Hold function to be combined
with many conventional op amp circuits. See the Harris Appli-
cation Note AN517 for a collection of circuit ideas.
Layout
A printed circuit board with ground plane is recommended
for best performance. Bypass capacitors (0.01µF to 0.1µF,
ceramic) should be provided from each power supply termi-
nal to the Supply Ground terminal on pin 13.
The ideal ground connections are pin 6 (SIG. GND) directly
to the system Signal Ground, and pin 13 (Supply Ground)
directly to the system Supply Common.
Hold Capacitor
The HA-5340 includes a 135pF MOS hold capacitor,
sufficient for most high speed applications (the Electrical
Specifications section is based on this internal capacitor).
Additional capacitance may be added between pins 7 and
11. This external hold capacitance will reduce droop rate at
the expense of acquisition time, and provide other trade-offs
as shown in the Performance Curves.
The hold capacitor C
H
should have high insulation
resistance and low dielectric absorption, to minimize droop
errors. Teflon®, polystyrene and polypropylene dielectric
capacitor types offer good performance over the specified
operating temperature range.
The hold capacitor terminal (pin 11) remains at virtual
ground potential. Any PC connection to this terminal should
be kept short and “guarded” by the ground plane, since
nearby signal lines or power supply voltages will introduce
errors due to drift current.
®Teflon is a registered Trademark of Dupont Corporation.
Typical Application
Figure 5 shows the HA-5340 connected as a unity gain non-
inverting amplifier - its most widely used configuration. As an
input device for a fast successive - approximation A/D
converter, it offers very high throughput rate for a monolithic
IC sample/hold amplifier. Also, the HA-5340’s hold step error
is adjustable to zero using the Offset Adjust potentiometer,
to deliver a 12-bit accurate output from the converter.
The HA-5340 output circuit does not include short circuit
protection, and consequently its output impedance remains
low at high frequencies. Thus, the step changes in load
current which occur during an A/D conversion are absorbed
at the S/H output with minimum voltage error. A momentary
short circuit to ground is permissible, but the output is not
designed to tolerate a short of indefinite duration.
-15V +15V
OFFSET
ADJUST
±15mV
C
H
50kΩ
3
4
5
9
11
HI - 774
1
V
IN
2
15pF
14
HA - 5340
13
6
5
9
R/C
ANALOG
COMMON
CONVERT
DIGITAL
OUTPUT
120pF
7
13
INPUT
S/H CONTROL
H
S
SYSTEM
POWER
GROUND
SYSTEM
SIGNAL
GROUND
NOTE: Pin Numbers Refer to
DIP Package Only.
FIGURE 5. TYPICAL HA-5340 CONNECTIONS; NONINVERTING UNITY GAIN MODE
5-28

HA1-5340-9 Related Products

HA1-5340-9 HA1-5340-5 HA3-5340-9 HA3-5340-5
Description Sample and Hold Circuit, 1 Func, Sample, 0.7us Acquisition Time, CDIP14 Sample and Hold Circuit, 1 Func, Sample, 0.7us Acquisition Time, CDIP14 Sample and Hold Circuit, 1 Func, Sample, 0.7us Acquisition Time, PDIP14 Sample and Hold Circuit, 1 Func, Sample, 0.7us Acquisition Time, PDIP14
Is it Rohs certified? incompatible incompatible incompatible incompatible
Maker Harris Harris Harris Harris
package instruction DIP, DIP14,.3 DIP, DIP14,.3 DIP, DIP14,.3 DIP, DIP14,.3
Reach Compliance Code unknown unknown unknown unknown
ECCN code EAR99 EAR99 EAR99 EAR99
Maximum acquisition time 0.9 µs 0.9 µs 0.9 µs 0.9 µs
Nominal acquisition time 0.7 µs 0.7 µs 0.7 µs 0.7 µs
Amplifier type SAMPLE AND HOLD CIRCUIT SAMPLE AND HOLD CIRCUIT SAMPLE AND HOLD CIRCUIT SAMPLE AND HOLD CIRCUIT
Maximum analog input voltage 10 V 10 V 10 V 10 V
Minimum analog input voltage -10 V -10 V -10 V -10 V
maximum rate of descent 95 V/s 95 V/s 95 V/s 95 V/s
JESD-30 code R-GDIP-T14 R-GDIP-T14 R-PDIP-T14 R-PDIP-T14
JESD-609 code e0 e0 e0 e0
Negative supply voltage upper limit -18 V -18 V -18 V -18 V
Nominal Negative Supply Voltage (Vsup) -15 V -15 V -15 V -15 V
Number of functions 1 1 1 1
Number of terminals 14 14 14 14
Maximum operating temperature 85 °C 75 °C 85 °C 75 °C
Package body material CERAMIC, GLASS-SEALED CERAMIC, GLASS-SEALED PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code DIP DIP DIP DIP
Encapsulate equivalent code DIP14,.3 DIP14,.3 DIP14,.3 DIP14,.3
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form IN-LINE IN-LINE IN-LINE IN-LINE
power supply +-15 V +-15 V +-15 V +-15 V
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
Sample and hold/Track and hold SAMPLE SAMPLE SAMPLE SAMPLE
Maximum slew rate 25 mA 25 mA 25 mA 25 mA
Supply voltage upper limit 18 V 18 V 18 V 18 V
Nominal supply voltage (Vsup) 15 V 15 V 15 V 15 V
surface mount NO NO NO NO
Temperature level INDUSTRIAL COMMERCIAL EXTENDED INDUSTRIAL COMMERCIAL EXTENDED
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE
Terminal pitch 2.54 mm 2.54 mm 2.54 mm 2.54 mm
Terminal location DUAL DUAL DUAL DUAL
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED -
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED -

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