X9111TB15 datasheet, PDF - EEWORLD Datasheet

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X9111TB15: Description100K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 1024 POSITIONS, BGA15, CSP-15; CategoryAnalog mixed-signal IC converter; File Size141KB，21 Pages; ManufacturerRenesas Electronics Corporation; Websitehttps://www.renesas.com/

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X9111TB15 Overview

100K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 1024 POSITIONS, BGA15, CSP-15

X9111TB15 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Renesas Electronics Corporation
Parts packaging code	BGA
package instruction	VFBGA, BGA15,3X5,20
Contacts	15
Reach Compliance Code	not_compliant
ECCN code	EAR99
Other features	NONVOLATILE MEMORY
control interface	3-WIRE SERIAL
Converter type	DIGITAL POTENTIOMETER
JESD-30 code	R-XBGA-B15
length	3.302 mm
Humidity sensitivity level	1
Number of functions	1
Number of positions	1024
Number of terminals	15
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	UNSPECIFIED
encapsulated code	VFBGA
Encapsulate equivalent code	BGA15,3X5,20
Package shape	RECTANGULAR
Package form	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	225
power supply	5 V
Certification status	Not Qualified
resistance law	LINEAR
Maximum resistor tolerance	20%
Maximum resistor terminal voltage	5 V
Minimum resistor terminal voltage
Maximum seat height	0.71 mm
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Nominal temperature coefficient	300 ppm/°C
Temperature level	COMMERCIAL
Terminal form	BALL
Terminal pitch	0.5 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
Nominal total resistance	100000 Ω
width	2.565 mm

X9111TB15 Preview

PPLICATION

OTES AND

EVELOPMENT

YSTEM

A V A I L A B L E

AN99 • AN115 • AN124 •AN133 • AN134 • AN135

Single Supply / Low Power / 1024-tap / SPI bus

Preliminary Information

X9111

Single Digitally-Controlled (XDCP

™

) Potentiometer

FEATURES

• 1024 Resistor Taps – 10-Bit Resolution

• SPI Serial Interface for write, read, and transfer

operations of the potentiometer

• Wiper Resistance, 40

Ω

Typical @ 5V

• Four Non-Volatile Data Registers

• Non-Volatile Storage of Multiple Wiper Positions

• Power On Recall. Loads Saved Wiper Position on

Power Up.

• Standby Current < 3

A Max

• V

: 2.7V to 5.5V Operation

• 100K

Ω

End to End Resistance

• 100 yr. Data Retention

• Endurance: 100, 000 Data Changes Per Bit Per

• 14-Lead TSSOP, 15-Lead CSP (Chip Scale

Packaging)

• Low Power CMOS

• Single Supply version of the X9110

DESCRIPTION

The X9111 integrates a single digitally controlled

potentiometer (XDCP) on a monolithic CMOS

integrated circuit.

The digital controlled potentiometer is implemented

using 1023 resistive elements in a series array.

Between each element are tap points connected to the

wiper terminal through switches. The position of the

wiper on the array is controlled by the user through the

SPI bus interface. The potentiometer has associated

with it a volatile Wiper Counter Register (WCR) and

four non-volatile Data Registers that can be directly

written to and read by the user. The contents of the

WCR controls the position of the wiper on the resistor

array though the switches. Powerup recalls the

contents of the default data register (DR0) to the WCR.

The XDCP can be used as a three-terminal

potentiometer or as a two terminal variable resistor in

a wide variety of applications including control,

parameter adjustments, and signal processing.

FUNCTIONAL DIAGRAM

SPI

Bus

Interface

Address

Data

Status

Bus

Interface &

Control

Write

Read

Transfer

Power On Recall

Wiper Counter

Data Registers

(DR0-DR3)

Wiper

100KΩ

1024-taps

POT

Control

REV 1.2 4/13/04

www.xicor.com

Characteristics subject to change without notice.

1 of 21

X9111

– Preliminary Information

DETAILED FUNCTIONAL DIAGRAM

HOLD

Power On

Recall

DR0

DR1

Wiper

Counter

(WCR)

SCK

100KΩ

1024-taps

Interface

and

Control

Circuitry

Data

DR2 DR3

Control

CIRCUIT LEVEL APPLICATIONS

• Vary the gain of a voltage ampliﬁer

• Provide programmable dc reference voltages for

comparators and detectors

• Control the volume in audio circuits

• Trim out the offset voltage error in a voltage ampliﬁer

circuit

• Set the output voltage of a voltage regulator

• Trim the resistance in Wheatstone bridge circuits

• Control the gain, characteristic frequency and

Q-factor in ﬁlter circuits

• Set the scale factor and zero point in sensor signal

conditioning circuits

• Vary the frequency and duty cycle of timer ICs

• Vary the dc biasing of a pin diode attenuator in RF

circuits

• Provide a control variable (I, V, or R) in feedback

circuits

SYSTEM LEVEL APPLICATIONS

• Adjust the contrast in LCD displays

• Control the power level of LED transmitters in

communication systems

• Set and regulate the DC biasing point in an RF

power ampliﬁer in wireless systems

• Control the gain in audio and home entertainment

systems

• Provide the variable DC bias for tuners in RF

wireless systems

• Set the operating points in temperature control

systems

• Control the operating point for sensors in industrial

systems

• Trim offset and gain errors in artiﬁcial intelligent

systems

REV 1.2 4/13/04

www.xicor.com

Characteristics subject to change without notice.

2 of 21

X9111

– Preliminary Information

PIN CONFIGURATION

TSSOP

SCK

X9111

HOLD

X9111

SCK

HOLD

CSP

PIN ASSIGNMENTS

(TSSOP)

(CSP)

B2, C2

Symbol

SCK

HOLD

Serial Data Output

Device Address

No Connect

Chip Select

Serial Clock

Serial Data Input

System Ground

Hardware Write Protect

Device Address

Function

Device Select. Pause the Serial Bus

Wiper Terminal of the Potentiometer

High Terminal of the Potentiometer

Low Terminal of the Potentiometer

System Supply Voltage

REV 1.2 4/13/04

www.xicor.com

Characteristics subject to change without notice.

3 of 21

X9111 – Preliminary Information

PIN DESCRIPTIONS

Bus Interface Pins

ERIAL

UTPUT

(SO)

SO is a serial data output pin. During a read cycle,

data is shifted out on this pin. Data is clocked out by

the falling edge of the serial clock.

ERIAL

NPUT

(SI)

SI is the serial data input pin. All opcodes, byte

addresses and data to be written to the pots and pot

registers are input on this pin. Data is latched by the

rising edge of the serial clock.

ERIAL

LOCK

(SCK)

The SCK input is used to clock data into and out of the

X9111.

OLD

(HOLD)

HOLD is used in conjunction with the CS pin to select

the device. Once the part is selected and a serial

sequence is underway, HOLD may be used to pause the

serial communication with the controller without resetting

the serial sequence. To pause, HOLD must be brought

LOW while SCK is LOW. To resume communication,

HOLD is brought HIGH, again while SCK is LOW. If the

pause feature is not used, HOLD should be held HIGH at

all times.

EVICE

DDRESS

, A

)

The address inputs are used to set the 8-bit slave

address. A match in the slave address serial data

stream must be made with the address input (A1–A0)

in order to initiate communication with the X9111.

HIP

ELECT

(CS)

When CS is HIGH, the X9111 is deselected and the

SO pin is at high impedance, and (unless an internal

write cycle is underway) the device will be in the

standby state. CS LOW enables the X9111, placing it

in the active power mode. It should be noted that after

a power-up, a HIGH to LOW transition on CS is

required prior to the start of any operation.

ARDWARE

RITE

ROTECT

NPUT

(WP)

The WP pin when LOW prevents nonvolatile writes to

the Data Registers.

Potentiometer Pins

, R

The R

and R

pins are equivalent to the terminal

connections on a mechanical potentiometer.

The wiper pin is equivalent to the wiper terminal of a

mechanical potentiometer.

Bias Supply Pins

YSTEM

UPPLY

OLTAGE

)

AND

UPPLY

ROUND

)

The V

pin is the system supply voltage. The V

is the system ground.

Other Pins

ONNECT

(NC)

Pin should be left open. This pin is used for Xicor

manufacturing and test purposes.

PRINCIPLES OF OPERATION

DEVICE DESCRIPTION

Serial Interface

The X9111 supports the SPI interface hardware

conventions. The device is accessed via the SI input

with data clocked-in on the rising SCK. CS must be

LOW and the HOLD and WP pins must be HIGH

during the entire operation.

The SO and SI pins can be connected together, since

they have three state outputs. This can help to reduce

system pin count.

Array Description

The X9111 is comprised of a resistor array (see Figure

1). The array contains the equivalent of 1023 discrete

resistive segments that are connected in series. The

physical ends of each array are equivalent to the ﬁxed

terminals of a mechanical potentiometer (R

and R

inputs).

At both ends of each array and between each resistor

segment is a CMOS switch connected to the wiper

) output. Within the individual array only one switch

may be turned on at a time.

REV 1.2 4/13/04

www.xicor.com

Characteristics subject to change without notice.

4 of 21

X9111 – Preliminary Information

Figure 1. Detailed Potentiometer Block Diagram

Serial Data Path

From Interface

Circuitry

(DR0)

(DR1)

Serial

Bus

Input

Parallel

Bus

Input

Wiper

Counter

(WCR)

(DR2)

(DR3)

If WCR = 000[HEX] then R

= R

If WCR = 3FF[HEX] then R

= R

These switches are controlled by a Wiper Counter

are decoded to select, and enable, one of 1024

switches.

Wiper Counter Register (WCR)

The X9111 contains a Wiper Counter Register (see

Table 1) for the XDCP potentiometer. The WCR is

equivalent to a serial-in, parallel-out register/counter

with its outputs decoded to select one of 1024 switches

along its resistor array. The contents of the WCR can

be altered in one of three ways: (1) it may be written

directly by the host via the write Wiper Counter

indirectly by transferring the contents of one of four

associated Data Registers via the XFR Data Register;

(3) it is loaded with the contents of its Data Register

zero (DR0) upon power-up.

The Wiper Counter Register is a volatile register; that

is, its contents are lost when the X9111 is powered-

down. Although the register is automatically loaded

with the value in R0 upon power-up, this may be

different from the value present at power-down. Power-

up guidelines are recommended to ensure proper

loadings of the R0 value into the WCR.

REV 1.2 4/13/04

Data Registers (DR3 to DR0)

The potentiometer has four 10-bit non-volatile Data

Registers. These can be read or written directly by the

host. Data can also be transferred between any of the

four Data Registers and the Wiper Counter Register.

All operations changing data in one of the Data

Registers is a nonvolatile operation and will take a

maximum of 10ms.

If the application does not require storage of multiple

settings for the potentiometer, the Data Registers can

be used as regular memory locations for system

parameters or user preference data.

A DR[9:0] is used to store one of the 1024 wiper

position (0 ~1023). Table 2.

Status Register (SR)

This 1-bit status register is used to store the system

status (see Table 3).

WIP: Write In Progress status bit, read only.

– When WIP=1, indicates that high-voltage write cycle

is in progress.

– When WIP=0, indicates that no high-voltage write

cycle is in progress.

Characteristics subject to change without notice.

www.xicor.com

5 of 21

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X9111TB15 Related Products

	X9111TB15	X9111TB15I-2.7	X9111TB15I	X9111TB15-2.7
Description	100K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 1024 POSITIONS, BGA15, CSP-15	100K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 1024 POSITIONS, BGA15, CSP-15	100K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 1024 POSITIONS, BGA15, CSP-15	100K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 1024 POSITIONS, BGA15, CSP-15
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible
Maker	Renesas Electronics Corporation	Renesas Electronics Corporation	Renesas Electronics Corporation	Renesas Electronics Corporation
Parts packaging code	BGA	BGA	BGA	BGA
package instruction	VFBGA, BGA15,3X5,20	CSP-15	VFBGA, BGA15,3X5,20	VFBGA, BGA15,3X5,20
Contacts	15	15	15	15
Reach Compliance Code	not_compliant	not_compliant	not_compliant	_compli
ECCN code	EAR99	EAR99	EAR99	EAR99
Other features	NONVOLATILE MEMORY	NONVOLATILE MEMORY	NONVOLATILE MEMORY	NONVOLATILE MEMORY
control interface	3-WIRE SERIAL	3-WIRE SERIAL	3-WIRE SERIAL	3-WIRE SERIAL
Converter type	DIGITAL POTENTIOMETER	DIGITAL POTENTIOMETER	DIGITAL POTENTIOMETER	DIGITAL POTENTIOMETER
JESD-30 code	R-XBGA-B15	R-XBGA-B15	R-XBGA-B15	R-XBGA-B15
length	3.302 mm	3.302 mm	3.302 mm	3.302 mm
Number of functions	1	1	1	1
Number of positions	1024	1024	1024	1024
Number of terminals	15	15	15	15
Maximum operating temperature	70 °C	85 °C	85 °C	70 °C
Package body material	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
encapsulated code	VFBGA	VFBGA	VFBGA	VFBGA
Encapsulate equivalent code	BGA15,3X5,20	BGA15,3X5,20	BGA15,3X5,20	BGA15,3X5,20
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	GRID ARRAY, VERY THIN PROFILE, FINE PITCH	GRID ARRAY, VERY THIN PROFILE, FINE PITCH	GRID ARRAY, VERY THIN PROFILE, FINE PITCH	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	225	240	225	225
power supply	5 V	3/5 V	5 V	3/5 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
resistance law	LINEAR	LINEAR	LINEAR	LINEAR
Maximum resistor tolerance	20%	20%	20%	20%
Maximum resistor terminal voltage	5 V	5 V	5 V	5 V
Maximum seat height	0.71 mm	0.71 mm	0.71 mm	0.71 mm
Nominal supply voltage	5 V	3 V	5 V	3 V
surface mount	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS
Nominal temperature coefficient	300 ppm/°C	300 ppm/°C	300 ppm/°C	300 ppm/°C
Temperature level	COMMERCIAL	INDUSTRIAL	INDUSTRIAL	COMMERCIAL
Terminal form	BALL	BALL	BALL	BALL
Terminal pitch	0.5 mm	0.5 mm	0.5 mm	0.5 mm
Terminal location	BOTTOM	BOTTOM	BOTTOM	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED	30	NOT SPECIFIED	NOT SPECIFIED
Nominal total resistance	100000 Ω	100000 Ω	100000 Ω	100000 Ω
width	2.565 mm	2.565 mm	2.565 mm	2.565 mm
Humidity sensitivity level	1	-	1	1

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