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70V7519S166DRG8

Description
Dual-Port SRAM, 256KX36, 3.6ns, CMOS, PQFP208, 28 X 28 MM, 3.50 MM HEIGHT, GREEN, PLASTIC, QFP-208
Categorystorage    storage   
File Size750KB,22 Pages
ManufacturerIDT (Integrated Device Technology)
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70V7519S166DRG8 Overview

Dual-Port SRAM, 256KX36, 3.6ns, CMOS, PQFP208, 28 X 28 MM, 3.50 MM HEIGHT, GREEN, PLASTIC, QFP-208

70V7519S166DRG8 Parametric

Parameter NameAttribute value
MakerIDT (Integrated Device Technology)
package instructionQFP,
Reach Compliance Codecompliant
Maximum access time3.6 ns
Other featuresPIPELINED OR FLOW THROUGH ARCHITECTURE
JESD-30 codeS-PQFP-G208
memory density9437184 bit
Memory IC TypeDUAL-PORT SRAM
memory width36
Number of functions1
Number of terminals208
word count262144 words
character code256000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize256KX36
Package body materialPLASTIC/EPOXY
encapsulated codeQFP
Package shapeSQUARE
Package formFLATPACK
Parallel/SerialPARALLEL
Maximum supply voltage (Vsup)3.45 V
Minimum supply voltage (Vsup)3.15 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formGULL WING
Terminal locationQUAD
HIGH-SPEED 3.3V 256K x 36
SYNCHRONOUS
BANK-SWITCHABLE
DUAL-PORT STATIC RAM
WITH 3.3V OR 2.5V INTERFACE
Features:
IDT70V7519S
256K x 36 Synchronous Bank-Switchable Dual-ported
SRAM Architecture
64 independent 4K x 36 banks
– 9 megabits of memory on chip
Bank access controlled via bank address pins
High-speed data access
– Commercial: 3.4ns(200MHz)/3.6ns (166MHz)/4.2ns
(133MHz) (max.)
– Industrial: 3.6ns (166MHz)/4.2ns (133MHz) (max.)
Selectable Pipelined or Flow-Through output mode
Counter enable and repeat features
Dual chip enables allow for depth expansion without
additional logic
Full synchronous operation on both ports
– 5ns cycle time, 200MHz operation (14Gbps bandwidth)
– Fast 3.4ns clock to data out
– 1.5ns setup to clock and 0.5ns hold on all control, data, and
address inputs @ 200MHz
– Data input, address, byte enable and control registers
– Self-timed write allows fast cycle time
Separate byte controls for multiplexed bus and bus
matching compatibility
LVTTL- compatible, 3.3V (±150mV) power supply
for core
LVTTL compatible, selectable 3.3V (±150mV) or 2.5V (±100mV)
power supply for I/Os and control signals on each port
Industrial temperature range (-40°C to +85°C) is
available at 166MHz and 133MHz
Available in a 208-pin Plastic Quad Flatpack (PQFP),
208-pin fine pitch Ball Grid Array (fpBGA), and 256-pin Ball
Grid Array (BGA)
Supports JTAG features compliant with IEEE 1149.1
Green parts available, see ordering information
Functional Block Diagram
PL/FT
L
OPT
L
CLK
L
ADS
L
CNTEN
L
REPEAT
L
R/W
L
CE
0L
CE
1L
BE
3L
BE
2L
BE
1L
BE
0L
OE
L
PL/FT
R
OPT
R
CLK
R
ADS
R
CNTEN
R
REPEAT
R
R/W
R
CE
0R
CE
1R
BE
3R
BE
2R
BE
1R
BE
0R
OE
R
CONTROL
LOGIC
MUX
4Kx36
MEMORY
ARRAY
(BANK 0)
MUX
CONTROL
LOGIC
I/O
0L-35L
I/O
CONTROL
MUX
4Kx36
MEMORY
ARRAY
(BANK 1)
MUX
I/O
CONTROL
I/O
0R-35R
A
11L
A
0L
BA
5L
BA
4L
BA
3L
BA
2L
BA
1L
BA
0L
ADDRESS
DECODE
ADDRESS
DECODE
A
11R
A
0R
BA
5R
BA
4R
BA
3R
BA
2R
BA
1R
BA
0R
BANK
DECODE
MUX
4Kx36
MEMORY
ARRAY
(BANK 63)
BANK
DECODE
NOTE:
1. The Bank-Switchable dual-port uses a true SRAM
core instead of the traditional dual-port SRAM core.
As a result, it has unique operating characteristics.
Please refer to the functional description on page 19
for details.
MUX
,
TDI
TDO
JTAG
TMS
TCK
TRST
5618 drw 01
JUNE 2015
1
DSC 5618/9
©2015 Integrated Device Technology, Inc.

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Description Dual-Port SRAM, 256KX36, 3.6ns, CMOS, PQFP208, 28 X 28 MM, 3.50 MM HEIGHT, GREEN, PLASTIC, QFP-208 Dual-Port SRAM, 256KX36, 3.6ns, CMOS, PBGA256, 17 X 17 MM, 1.40 MM HEIGHT, 1 MM PITCH, GREEN, BGA-256 Dual-Port SRAM, 256KX36, 3.6ns, CMOS, PBGA256, 17 X 17 MM, 1.40 MM HEIGHT, 1 MM PITCH, GREEN, BGA-256 Dual-Port SRAM, 256KX36, 3.6ns, CMOS, PBGA256, 17 X 17 MM, 1.40 MM HEIGHT, 1 MM PITCH, GREEN, BGA-256 Dual-Port SRAM, 256KX36, 3.6ns, CMOS, PQFP208, 28 X 28 MM, 3.50 MM HEIGHT, GREEN, PLASTIC, QFP-208 Dual-Port SRAM, 256KX36, 3.6ns, CMOS, PQFP208, 28 X 28 MM, 3.50 MM HEIGHT, GREEN, PLASTIC, QFP-208 Dual-Port SRAM, 256KX36, 4.2ns, CMOS, PBGA208, 15 X 15 MM, 1.40 MM HEIGHT, 0.80 MM PITCH, GREEN, FPBGA-208 Dual-Port SRAM, 256KX36, 4.2ns, CMOS, PBGA208, 15 X 15 MM, 1.40 MM HEIGHT, 0.80 MM PITCH, GREEN, FPBGA-208
package instruction QFP, BGA, BGA, BGA, QFP, QFP, BGA, BGA,
Reach Compliance Code compliant compliant compliant compliant compliant compliant compliant compliant
Maximum access time 3.6 ns 3.6 ns 3.6 ns 3.6 ns 3.6 ns 3.6 ns 4.2 ns 4.2 ns
Other features PIPELINED OR FLOW THROUGH ARCHITECTURE PIPELINED OR FLOW THROUGH ARCHITECTURE PIPELINED OR FLOW THROUGH ARCHITECTURE PIPELINED OR FLOW THROUGH ARCHITECTURE PIPELINED OR FLOW THROUGH ARCHITECTURE PIPELINED OR FLOW THROUGH ARCHITECTURE PIPELINED OR FLOW THROUGH ARCHITECTURE PIPELINED OR FLOW THROUGH ARCHITECTURE
JESD-30 code S-PQFP-G208 S-PBGA-B256 S-PBGA-B256 S-PBGA-B256 S-PQFP-G208 S-PQFP-G208 S-PBGA-B208 S-PBGA-B208
memory density 9437184 bit 9437184 bit 9437184 bit 9437184 bit 9437184 bit 9437184 bit 9437184 bit 9437184 bit
Memory IC Type DUAL-PORT SRAM DUAL-PORT SRAM DUAL-PORT SRAM DUAL-PORT SRAM DUAL-PORT SRAM DUAL-PORT SRAM MULTI-PORT SRAM MULTI-PORT SRAM
memory width 36 36 36 36 36 36 36 36
Number of functions 1 1 1 1 1 1 1 1
Number of terminals 208 256 256 256 208 208 208 208
word count 262144 words 262144 words 262144 words 262144 words 262144 words 262144 words 262144 words 262144 words
character code 256000 256000 256000 256000 256000 256000 256000 256000
Operating mode SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
Maximum operating temperature 70 °C 70 °C 85 °C 85 °C 85 °C 85 °C 70 °C 70 °C
organize 256KX36 256KX36 256KX36 256KX36 256KX36 256KX36 256KX36 256KX36
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code QFP BGA BGA BGA QFP QFP BGA BGA
Package shape SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE
Package form FLATPACK GRID ARRAY GRID ARRAY GRID ARRAY FLATPACK FLATPACK GRID ARRAY GRID ARRAY
Parallel/Serial PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL
Maximum supply voltage (Vsup) 3.45 V 3.45 V 3.45 V 3.45 V 3.45 V 3.45 V 3.45 V 3.45 V
Minimum supply voltage (Vsup) 3.15 V 3.15 V 3.15 V 3.15 V 3.15 V 3.15 V 3.15 V 3.15 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
surface mount YES YES YES YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL COMMERCIAL COMMERCIAL
Terminal form GULL WING BALL BALL BALL GULL WING GULL WING BALL BALL
Terminal location QUAD BOTTOM BOTTOM BOTTOM QUAD QUAD BOTTOM BOTTOM
Maker IDT (Integrated Device Technology) - - - IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology)

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