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LC5520DCX-1000.0M

Description
LVDS Output Clock Oscillator,
CategoryPassive components    oscillator   
File Size798KB,6 Pages
ManufacturerPletronics
Download Datasheet Parametric View All

LC5520DCX-1000.0M Overview

LVDS Output Clock Oscillator,

LC5520DCX-1000.0M Parametric

Parameter NameAttribute value
MakerPletronics
Reach Compliance Codecompliant
Other featuresENABLE/DISABLE FUNCTION
maximum descent time0.35 ns
Frequency Adjustment - MechanicalNO
frequency stability20%
Installation featuresSURFACE MOUNT
Nominal operating frequency1000 MHz
Maximum operating temperature70 °C
Minimum operating temperature-20 °C
Oscillator typeLVDS
Output load50 OHM
physical size5.0mm x 3.2mm x 1.35mm
longest rise time0.35 ns
Maximum supply voltage1.89 V
Minimum supply voltage1.71 V
Nominal supply voltage1.8 V
surface mountYES
maximum symmetry55/45 %

LC5520DCX-1000.0M Preview

PLETRONICS
LC55D Series 1.8V
LVDS Clock Oscillator
Features
Applications
Driving A/Ds, D/As, FPGAs
Fibre Channel
Ethernet, GbE, SynchE
Medical
Storage Area Networking
COTS
Telecom
PON
Pletronics’ LC55D Series is a Quartz crystal controlled
Precision Square Wave Oscillator
LVDS Output
Enable/Disable Function on pad 1
Low Jitter
1.8V nominal Supply Voltage
15-1000 MHz Frequency Range
LC55DX
3.20 x 5.0 x 1.35 mm
LCC Ceramic Package
Electrical Characteristics
Parameter
Frequency Range
2
Min
15
-20
-25
-50
-10
-20
-40
1.71
-
Typ
-
-
Max
1000
-20
-25
-50
+70
+70
+85
1.89
81
Unit
MHz
ppm
Condition
Consult factory for other options
For all supply voltages, load changes, aging for 1 year at 25°C ± 2°C,
shock, vibration and temperatures
Standard range
Extended range
C
option
Extended range
E
option
Frequency Stability vs. Temperature
2
± 20 =
20,
± 25 =
44,
± 50 =
45
Operating Temperature Range
2
Supply Voltage
1, 2
V
CC
Supply Current
I
CC
-
1.80
69
°C
V
mA
Output Waveform
Change in V
OCM
between
complementary output states ΔV
OCM
Output leakage current V
OZ
Output differential peak V
P
Change in V
P
between complentary
output states
V
P
Output T
RISE
and T
FALL
Duty Cycle t
ODC
V
DISABLE
V
ENABLE
Enable/Disable Internal Pull-up
RMS Jitter
Phase Noise
1 kHz
10 kHz
100 kHz
1 MHz
10 MHz
-
-20
247
150
-
-
45
-
70
-
-
-
-
-
-
-
50
-
-
200
150
LVDS
50
+20
454
454
50
350
55
30
-
-
250
mV
µA
mV
mV
ps
%
%V
DD
kΩ
fs
Vth is 20% and 80% of waveform
Referenced to 50% of amplitude or crossing point
Referenced to Ground
To V
CC
, measured with pad 1 = 0.0 volts
12 kHz to 20 MHz from the output frequency at 156.25 MHz
Output off, Vout = 0.75V to 1.75V
15 MHz to 700 MHz
700 MHz to 1000 MHz
-
-113
-127
-135
-144
-152
-
-
dBc/Hz
25°C ± 2°C at 156.25 MHz
Storage Temperature Range
-55
+125
°C
Notes: Specifications with Pad 1 E/D open circuit
1
Place an appropriate power supply bypass capacitor next to device for correct operation
2
Specified by part number
*Requires external AC coupling for V
CC
= 1.8-V range as indicated. The common-mode voltage has
to be generated and applied externally
Product information is current as of publication date. The product conforms to specifications per the terms of the Pletronics standard warranty.
Production processing does not necessarily include testing of all parameters.
Nov 12, 2018 Rev. B
Pg 1
Copyright © 2018, Pletronics Inc.
19013 36th Ave. W, Lynnwood, WA 98036 USA
www.pletronics.com 
425-776-1880
PLETRONICS
LC55D Series 1.8V
LVDS Clock Oscillator
Part Number
Series
Model
Frequency Stability
Operating
Temperature Range
Supply Voltage
V
CC
Frequency in
MHz
Optional
T&R Packaging code
LC55
45
45
= ± 50 ppm (STD)
44
= ± 25 ppm
20
= ± 20 ppm
D
E
Blank
= -10 to +70
o
C (STD)
C
= -20 to +70
o
C
E
= -40 to +85
o
C
X
X
= 1.8V±5%
- 100.0M
-XX
T250
= 250 per Reel
15 - 1000 MHz
T500
= 500 per Reel
T1K
= 1000 per Reel (Std for 1K pcs)
Device Marking
PFFF.F L
YMDxxx
P = Pletronics
FFF.FF
L = Frequency in MHz, L for LVDS
YMD
= Date Code, All other marking is internal codes
Note: Specifications such as frequency stability, supply voltage and operating temperature range, etc. are not identified from marking.
External packaging labels and packing list will correctly identify the ordered Pletronics part number.
Codes for Date Code YMD (Year Month Day)
Code
Year
Code
Day
Code
Day
4
2014
1
1
H
17
5
2015
2
2
J
18
3
3
K
19
6
2016
4
4
L
20
7
2017
5
5
M
21
8
2018
6
6
N
22
Code
Month
7
7
P
23
8
8
R
24
A
JAN
9
9
T
25
B
FEB
A
10
U
26
C
MAR
B
11
V
27
D
APR
C
12
W
28
E
MAY
D
13
X
29
F
JUN
E
14
Y
30
F
15
Z
31
G
JUL
G
16
H
AUG
J
SEP
K
OCT
L
NOV
M
DEC
Package Labeling
Tape and Reel available for quantities of 250 to 1000 per reel, cut tape for < 250. 16mm tape, 8mm pitch.
P/N Label is 1" x 2.6" (25.4mm x 66.7mm)
Font is Courier New
Bar code is 39-Full ASCII
RoHs Label is 1" x 2.6" (25.4mm x 66.7mm)
Font is Arial
Pletronics Inc. certifies this device is in accordance with the RoHS 2 (2011/65/EU) and WEEE (2002/96/EC) directives.
Pletronics Inc. guarantees the device does not contain the following: Cadmium, Hexavalent Chromium, Lead, Mercury, PBB’s, PBDE’s
Weight of the Device: 0.09 grams
Moisture Sensitivity Level: 1 As defined in J-STD-020D
Second Level Interconnect code: e4
Product information is current as of publication date. The product conforms to specifications per the terms of the Pletronics standard warranty.
Production processing does not necessarily include testing of all parameters.
Nov 12, 2018 Rev. B
Pg 2
Copyright © 2018, Pletronics Inc.
19013 36th Ave. W, Lynnwood, WA 98036 USA
www.pletronics.com 
425-776-1880
PLETRONICS
LC55D Series 1.8V
LVDS Clock Oscillator
Mechanical Dimensions
Inches
A
B
C
D
1
E
1
F
1
G
1
H
1
I
1
J
1
K
1
L
1
M
1
N
1
O
1
P
1
1
mm
5.00 ± 0.15
3.20 ± 0.15
1.35 max
2.54
1.20
0.10
1.00
0.64
0.45
0.10R
0.20R
0.197 ± 0.006
0.126 ± 0.006
0.053 max
0.100
0.047
0.004
0.039
0.026
0.018
0.004R
0.008R
End Detents
0.026
0.028
0.049
0.004
0.64
0.70
1.23
0.10
Pad Layout
mm shown
Disclaimer: Recommended layout shown.
Adjust layout as needed for individual
process requirements.
Typical dimensions
(Not to Scale)
Contacts (pads):
Gold 11.8 to 39.4 µinches (0.3 to 1.0 µm) over Nickel 50 to 350 µinches (1.27 to 8.89 µm)
Layout
Pad Function
1
Output
Enable/Disable
No connect
Ground (GND)
Output
Output*
V
CC
Supply Voltage
SDA
SCL
Both outputs must be terminated and biased for proper operation.
The ideal termination is 100 ohms between the outputs
Connect an appropriate power supply bypass capacitor as close as possible to pad 4
Note
The oscillator shall operate when this pad is not connected.
The output will be inhibited (high impedance state) when this pad is logic low.
Recommend connecting this pad to V
CC
if the oscillator is to be always on.
There is no internal connection to this pad. Recommend connecting to pad 1 to permit E/D input on either pad for layout.
2
3
4
5
6
7
8
For Optimum Jitter Performance, Pletronics recommends:
$
$
$
$
A ground plane under the device
Do not route large transient signals (both current and voltage) under the device
Do not place near a large magnetic field such as a high frequency switching power supply
Do not place near piezoelectric buzzers or mechanical fans
Nov 12, 2018 Rev. B
Pg 3
Product information is current as of publication date. The product conforms to specifications per the terms of the Pletronics standard warranty.
Production processing does not necessarily include testing of all parameters.
Copyright © 2018, Pletronics Inc.
19013 36th Ave. W, Lynnwood, WA 98036 USA
www.pletronics.com 
425-776-1880
PLETRONICS
LC55D Series 1.8V
LVDS Clock Oscillator
Electrical Test /Load Circuit
Environmental / ESD Ratings
Reliability: Environmental Compliance
Parameter
Mechanical Shock
Vibration
Solderability
Thermal Shock
JESD22-B104
JESD22-B103
IPC J-STD-002
MIL-STD-883 Method 1011, Condition A
ESD Rating
Model
Human Body Model
Charged Device Model
Machine Model
Condition
Min. Voltage
2000V
500V
200V
Condition
JESD22-A114
JESD 22-C101
JESD22-A115
Absolute Maximum Ratings
Parameter
Thermal Characteristics:
The maximum die or junction temperature is 155
o
C
The thermal resistance junction to board is 45 to 65
o
C/Watt depending on the solder
pads, ground plane and construction of the PCB.
V
CC
Supply Voltage
Vi
Vo
Input Voltage
Output Voltage
Unit
-0.5V to +5.0V
-0.5V to V
CC
+ 0.5V
-0.5V to V
CC
+ 0.5V
Product information is current as of publication date. The product conforms to specifications per the terms of the Pletronics standard warranty.
Production processing does not necessarily include testing of all parameters.
Nov 12, 2018 Rev. B
Pg 4
Copyright © 2018, Pletronics Inc.
19013 36th Ave. W, Lynnwood, WA 98036 USA
www.pletronics.com 
425-776-1880
PLETRONICS
LC55D Series 1.8V
LVDS Clock Oscillator
Reflow Cycle
The part may be reflowed 2 times without degradation
(typical for lead free processing).
Tape and Reel
Tape Constant Dimensions Table 1
Tape
Size
8mm
12mm
16mm
24mm
1.5
+0.1
-0.0
Do
D1
min
1.0
1.5
1.5
1.5
1.75
±0.1
4.0
±0.1
E1
Po
P2
2.0
±0.05
2.0
±0.1
0.6
0.6
0.1
S1
min
T
max
T1
max
Tape Variable Dimensions Table 2
Tape
Size
16mm
B1
max
12.1
E2
min
14.25
F
7.5
±0.1
P1
8.0
±0.1
T2
max
8.0
W
max
16.3
Ao, Bo &
Ko
Note 1
Dimensions in mm
Drawing Not to scale
Note 1: Embossed cavity to conform to EIA– 481-B
Reel Dimensions (may vary) Table 3
A
Reel
Size
7
10
13
Inches
7.0
10.0
13.0
mm
177.8
254.0
330.2
Inches
2.50
4.00
3.75
B
mm
63.5
101.6
95.3
C
mm
13.0
+0.5
-0.2
D
mm
Tape size +0.4
+2.0
-0.0
Product information is current as of publication date. The product conforms to specifications per the terms of the Pletronics standard warranty.
Production processing does not necessarily include testing of all parameters.
Nov 12, 2018 Rev. B
Pg 5
Copyright © 2018, Pletronics Inc.
19013 36th Ave. W, Lynnwood, WA 98036 USA
www.pletronics.com 
425-776-1880
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