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IDT74LVC652APG8

Description
Registered Bus Transceiver, LVC/LCX/Z Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, 0.65 MM PITCH, TSSOP-24
Categorylogic    logic   
File Size94KB,7 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric Compare View All

IDT74LVC652APG8 Overview

Registered Bus Transceiver, LVC/LCX/Z Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, 0.65 MM PITCH, TSSOP-24

IDT74LVC652APG8 Parametric

Parameter NameAttribute value
MakerIDT (Integrated Device Technology)
Parts packaging codeTSSOP
package instructionTSSOP,
Contacts24
Reach Compliance Codeunknown
Other featuresWITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
seriesLVC/LCX/Z
JESD-30 codeR-PDSO-G24
JESD-609 codee0
length7.8 mm
Logic integrated circuit typeREGISTERED BUS TRANSCEIVER
Number of digits8
Number of functions1
Number of ports2
Number of terminals24
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
propagation delay (tpd)8.4 ns
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2.7 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTIN LEAD
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
width4.4 mm
IDT74LVC652A
3.3V CMOS OCTAL BUS TRANSCEIVER AND REGISTER
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS OCTAL BUS
TRANSCEIVER AND REGISTER
WITH 3-STATE OUTPUTS
AND 5 VOLT TOLERANT I/O
• 0.5 MICRON CMOS Technology
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• V
CC
= 3.3V ± 0.3V, Normal Range
• V
CC
= 2.7V to 3.6V, Extended Range
• CMOS power levels (0.4µ W typ. static)
µ
• Rail-to-rail output swing for increased noise margin
• All inputs, outputs, and I/O are 5V tolerant
• Supports hot insertion
• Available in SOIC, SSOP, QSOP, and TSSOP packages
IDT74LVC652A
FEATURES:
DESCRIPTION:
DRIVE FEATURES:
• High Output Drivers: ±24mA
• Reduced system switching noise
APPLICATIONS:
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
The LVC652A octal bus transceiver/register is built using advanced dual
metal CMOS technology. The device consists of a bus transceiver circuit,
D-type flip-flops, and control circuitry arranged for multiplexed transmission
of data directly from the data bus or from the internal storage registers.
Output-enable (OEAB and
OEBA)
inputs are provided to control the
transceiver functions. Select-control (SAB and SBA) inputs are provided
to select whether real-time or stored data is transferred. The circuitry used
for select control eliminates the typical decoding glitch that occurs in a
multiplexer during the transition between stored and real-time data. A low
input selects real-time data, and a high input selects stored data.
Data on the A or B data bus, or both, is stored in the internal D-type flip-
flops by low-to-high transitions at the appropriate clock (CLKAB or CLKBA)
inputs, regardless of the select- or enable-control pins. When the SAB and
SBA are in the real-time transfer mode, it is possible to store data without
using the internal D-type flip-flops by simultaneously enabling OEAB and
OEBA.
In this configuration, each output reinforces its input.
The LVC652A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
Inputs can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V system environ-
ment.
FUNCTIONAL BLOCK DIAGRAM
OEAB
OEBA
CLKBA
SBA
CLKAB
SAB
3
21
23
22
1
2
B REG
D
C
4
A1
A REG
D
C
20
B1
TO SEVEN OTHER CHANNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
© 1999 Integrated Device Technology, Inc.
APRIL 1999
DSC-4620/2

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Description Registered Bus Transceiver, LVC/LCX/Z Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, 0.65 MM PITCH, TSSOP-24 Registered Bus Transceiver, LVC/LCX/Z Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, 0.65 MM PITCH, SSOP-24 Registered Bus Transceiver, LVC/LCX/Z Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, 1.27 MM PITCH, SOIC-24 Registered Bus Transceiver, LVC/LCX/Z Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, 0.635 MM PITCH, QSOP-24
Parts packaging code TSSOP SSOP SOIC SOIC
package instruction TSSOP, SSOP, 1.27 MM PITCH, SOIC-24 0.635 MM PITCH, QSOP-24
Contacts 24 24 24 24
Reach Compliance Code unknown unknown unknown unknown
Other features WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
series LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z
JESD-30 code R-PDSO-G24 R-PDSO-G24 R-PDSO-G24 R-PDSO-G24
JESD-609 code e0 e0 e0 e0
length 7.8 mm 8.2 mm 15.4 mm 8.65 mm
Logic integrated circuit type REGISTERED BUS TRANSCEIVER REGISTERED BUS TRANSCEIVER REGISTERED BUS TRANSCEIVER REGISTERED BUS TRANSCEIVER
Number of digits 8 8 8 8
Number of functions 1 1 1 1
Number of ports 2 2 2 2
Number of terminals 24 24 24 24
Maximum operating temperature 85 °C 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE
Output polarity TRUE TRUE TRUE TRUE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP SSOP SOP SSOP
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE SMALL OUTLINE, SHRINK PITCH
propagation delay (tpd) 8.4 ns 8.4 ns 8.4 ns 8.4 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1.2 mm 2 mm 2.65 mm 1.75 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V 3.6 V 3.6 V
Minimum supply voltage (Vsup) 2.7 V 2.7 V 2.7 V 2.7 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V 3.3 V 3.3 V
surface mount YES YES YES YES
technology CMOS CMOS CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal surface TIN LEAD TIN LEAD TIN LEAD TIN LEAD
Terminal form GULL WING GULL WING GULL WING GULL WING
Terminal pitch 0.65 mm 0.65 mm 1.27 mm 0.635 mm
Terminal location DUAL DUAL DUAL DUAL
width 4.4 mm 5.3 mm 7.5 mm 3.9116 mm
Maker IDT (Integrated Device Technology) - IDT (Integrated Device Technology) IDT (Integrated Device Technology)
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