EEWORLDEEWORLDEEWORLD

Part Number

Search

NTH06NAA3-FREQ

Description
HCMOS Output Clock Oscillator, 6MHz Min, 24MHz Max
CategoryPassive components    oscillator   
File Size773KB,2 Pages
ManufacturerPericom Semiconductor Corporation (Diodes Incorporated)
Websitehttps://www.diodes.com/
Download Datasheet Parametric View All

NTH06NAA3-FREQ Overview

HCMOS Output Clock Oscillator, 6MHz Min, 24MHz Max

NTH06NAA3-FREQ Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerPericom Semiconductor Corporation (Diodes Incorporated)
Reach Compliance Codecompliant
maximum descent time4 ns
Frequency Adjustment - MechanicalNO
frequency stability20%
Manufacturer's serial numberNTH
Installation featuresSURFACE MOUNT
Maximum operating frequency24 MHz
Minimum operating frequency6 MHz
Maximum operating temperature70 °C
Minimum operating temperature
Oscillator typeHCMOS
Output load50 PF
physical size13mm x 13mm x 5.08mm
longest rise time4 ns
Nominal supply voltage3.3 V
surface mountYES
maximum symmetry40/60 %
SaRonix
Crystal Clock Oscillator
Technical Data
Frequency Range:
Frequency Stability:
0.5 MHz to 106.25 MHz
±20, ±25, ±50 or ±100 ppm over all conditions: calibration
tolerance, operating temperature, input voltage change,
load change, 30 day aging, shock and vibration.
3.3V, Tri-State, HCMOS
NTH / NCH Series
Temperature Range:
Operating:
Storage:
Supply Voltage:
Recommended Operating:
Supply Current:
ACTUAL SIZE
0 to +70°C or -40 to +85°C, See Part Numbering Guide
-55 to +125°C
3.3V ±10%
20mA
25mA
30mA
35mA
max, 0.5 to 30 MHz
max, 30+ to 50 MHz
max, 50+ to 80 MHz
max, 80+ to 106.25 MHz
Description
A crystal controlled, low current, low
jitter and high frequency oscillator with
precise rise and fall times demanded in
networking applications. The tri-state
function on the NTH enables the output
to go high impedance. Device is pack-
aged in a 14 or an 8-pin DIP compatible
resistance welded, all metal grounded
case to reduce EMI.
Applications & Features
ADSL, DSL
DS3, ES3, E1, STS-1, T1
Ethernet Switch, Gigabit Ethernet
Fibre Channel Controller
MPEG
Network Processors
Voice Over Packet
32 Bit Microprocessors
Tri-State output on NTH
HCMOS compatible
Available up to 106.25 MHz
Grounded, all metal, full or half size
packages, gull wing leads available
• Plastic SMD available, see separate
data sheet
Output Waveform
CMOS
T
r
Logic 1
80% V
DD
50% V
DD
20% V
DD
Logic 0
T
f
Output Drive:
HCMOS
Symmetry:
Rise and Fall Times:
40/60% max @ 50% V
DD
45/55% max
to
70 MHz max
4ns max 0.5 to 50 MHz, 20% to 80% V
DD
3ns max 50+ to 80 MHz
1.5ns max 80+ to 106.25 MHz
10% V
DD
max
90% V
DD
min
50 pF, 0.5 to 50 MHz
30pF, 50+ to 70 MHz
15pF, 70+ to 106.25 MHz
8ps max
Logic 0:
Logic 1:
Load:
Period Jitter RMS:
Mechanical:
Shock:
Solderability:
Terminal Strength:
Vibration:
Solvent Resistance:
Resistance to Soldering Heat:
Environmental:
Gross Leak Test:
Fine Leak Test:
Thermal Shock:
Moisture Resistance:
MIL-STD-883,
MIL-STD-883,
MIL-STD-883,
MIL-STD-883,
MIL-STD-202,
MIL-STD-202,
Method 2002, Condition B
Method 2003
Method 2004, Conditions A & C
Method 2007, Condition A
Method 215
Method 210, Condition A, B or C
MIL-STD-883,
MIL-STD-883,
MIL-STD-883,
MIL-STD-883,
Method
Method
Method
Method
1014, Condition C
1014, Condition A2
1011, Condition A
1004
SYMMETRY
DS-159
REV C01
SaRonix
141 Jefferson Drive • Menlo Park, CA 94025 • USA • 650-470-7700 • 800-227-8974 • Fax 650-462-9894
[Raspberry Pi Pico Review] Thonny software builds compilation environment + LED flashing
[i=s]This post was last edited by 1nnocent on 2021-3-26 18:57[/i]I wanted to try programming in C first, but after browsing the official website for a long time, I didn't get much. I happened to find ...
1nnocent DIY/Open Source Hardware
A fully digital phase-locked loop design under large frequency deviation and low signal-to-noise ratio conditions
A fully digital phase-locked loop design under large frequency deviation and low signal-to-noise ratio conditions...
雷北城 Altera SoC
EEWORLD University Hall ---- Learn HLS with me
Learn HLS with me : https://training.eeworld.com.cn/course/4854This series of teaching videos is led by Xilinx senior strategic application engineers to guide you from scratch, step by step to master ...
抛砖引玉 FPGA/CPLD
[Bluesight AB32VG1 RISC-V board "meets" RTT] Run it first
I received the board yesterday. It is quite small and compact. The components are hand-soldered, the soldering is very good, and the board is very clean. The board has audio jack, SD card holder, etc....
qiangtech Domestic Chip Exchange
Qinheng PD sink protocol chip CH224K test, rant & alternative play
[i=s]This post was last edited by Buyixin on 2022-7-7 00:14[/i]Qinheng PD sink protocol chip CH224K test, rantalternative playFirst, write in front This is my first time participating in a chip promot...
不亦心 Domestic Chip Exchange
I always get range check error when I import DDB files with AD09
Could you guys please tell me how to solve this problem? Thank you very much!...
吃星星的狼 PCB Design

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号