TC4423/TC4424/TC4425
3A Dual High-Speed Power MOSFET Drivers
Features
• High Peak Output Current: 3A
• Wide Input Supply Voltage Operating Range:
- 4.5V to 18V
• High Capacitive Load Drive Capability:
- 1800 pF in 25 ns
• Short Delay Times: <40 ns (typ)
• Matched Rise/Fall Times
• Low Supply Current:
- With Logic ‘1’ Input – 3.5 mA (Max)
- With Logic ‘0’ Input – 350 µA (Max)
• Low Output Impedance: 3.5Ω (typ)
• Latch-Up Protected: Will Withstand 1.5A Reverse
Current
• Logic Input Will Withstand Negative Swing Up To
5V
• ESD Protected: 4 kV
• Pin compatible with the TC1426/TC1427/TC1428,
TC4426/TC4427/TC4428 and TC4426A/
TC4427A/TC4428A devices.
• Space-saving 8-Pin 6x5 DFN Package
General Description
The TC4423/TC4424/TC4425 devices are a family of
3A, dual-output buffers/MOSFET drivers. Pin compati-
ble with the TC1426/27/28, TC4426/27/28 and
TC4426A/27A/28A dual 1.5A driver families, the
TC4423/24/25 family has an increased latch-up current
rating of 1.5A, making them even more robust for
operation in harsh electrical environments.
As MOSFET drivers, the TC4423/TC4424/TC4425 can
easily charge 1800 pF gate capacitance in under
35 nsec, providing low enough impedances in both the
on and off states to ensure the MOSFET's intended
state will not be affected, even by large transients.
The TC4423/TC4424/TC4425 inputs may be driven
directly from either TTL or CMOS (2.4V to 18V). In
addition, the 300 mV of built-in hysteresis provides
noise immunity and allows the device to be driven from
slowly rising or falling waveforms.
Applications
• Switch Mode Power Supplies
• Pulse Transformer Drive
• Line Drivers
Package Types
(1)
8-Pin PDIP
TC4423 TC4424 TC4425
NC
IN A
GND
IN B
1
8
2
TC4423
7
3
TC4424
6
4
TC4425
5
NC
OUT A
V
DD
OUT B
NC
OUT A
V
DD
OUT B
NC
OUT A
V
DD
OUT B
16-Pin SOIC (Wide)
TC4423 TC4424 TC4425
NC
IN A
NC
GND
GND
NC
IN B
NC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
8-Pin DFN
(2)
TC4423 TC4424 TC4425
NC
1
8
TC4423
TC4424
TC4425
NC
OUT A
V
DD
OUT B
NC
OUT A
V
DD
OUT B
NC
OUT A
V
DD
OUT B
IN A
2
GND
3
TC4423
TC4424
TC4425
7
6
5
NC
OUT A
OUT A
V
DD
V
DD
OUT B
OUT B
NC
NC
OUT A
OUT A
V
DD
V
DD
OUT B
OUT B
NC
NC
OUT A
OUT A
V
DD
V
DD
OUT B
OUT B
NC
IN B
4
Note 1:
Duplicate pins must both be connected for proper operation.
2:
Exposed pad of the DFN package is electrically isolated.
2004 Microchip Technology Inc.
DS21421D-page 1
TC4423/TC4424/TC4425
Functional Block Diagram
(1)
V
DD
Inverting
750 µA
300 mV
Output
Input
Effective
Input C = 20 pF
(Each Input)
GND
4.7V
Non-inverting
TC4423
Dual Inverting
TC4424
Dual Non-inverting
TC4425
One Inverting, One Non-inverting
Note 1:
Unused inputs should be grounded.
DS21421D-page 2
2004 Microchip Technology Inc.
TC4423/TC4424/TC4425
1.0
ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings †
Supply Voltage ................................................................+22V
Input Voltage, IN A or IN B
................................................ (V
DD
+ 0.3V) to (GND – 5V)
Package Power Dissipation (T
A
≤
70°C)
DFN .........................................................................
Note 2
PDIP .......................................................................730 mW
SOIC.......................................................................470 mW
†
Notice:
Stresses above those listed under "Maximum
Ratings" may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational sections of this specification is not intended.
Exposure to maximum rating conditions for extended periods
may affect device reliability.
DC CHARACTERISTICS
Electrical Specifications:
Unless otherwise indicated, T
A
= +25°C, with 4.5V
≤
V
DD
≤
18V.
Parameters
Input
Logic ‘1’, High Input Voltage
Logic ‘0’, Low Input Voltage
Input Current
Output
High Output Voltage
Low Output Voltage
Output Resistance, High
Output Resistance, Low
Peak Output Current
Latch-Up Protection With-
stand Reverse Current
Switching Time (Note 1)
Rise Time
Fall Time
Delay Time
Delay Time
Power Supply
Power Supply Current
Note 1:
2:
I
S
—
—
1.5
0.15
2.5
0.25
mA
V
IN
= 3V (Both inputs)
V
IN
= 0V (Both inputs)
t
R
t
F
t
D1
t
D2
—
—
—
—
23
25
33
38
35
35
75
75
ns
ns
ns
ns
Figure 4-1, Figure 4-2,
C
L
= 1800 pF
Figure 4-1, Figure 4-2,
C
L
= 1800 pF
Figure 4-1, Figure 4-2,
C
L
= 1800 pF
Figure 4-1, Figure 4-2,
C
L
= 1800 pF
V
OH
V
OL
R
OH
R
OL
I
PK
I
REV
V
DD
– 0.025
—
—
—
—
—
—
—
2.8
3.5
3
>1.5
—
0.025
5
5
—
—
V
V
Ω
Ω
A
A
Duty cycle
≤
2%, t
≤
300 µsec.
I
OUT
= 10 mA, V
DD
= 18V
I
OUT
= 10 mA, V
DD
= 18V
V
IH
V
IL
I
IN
2.4
—
–1
—
—
—
—
0.8
1
V
V
µA
0V
≤
V
IN
≤
V
DD
Sym
Min
Typ
Max
Units
Conditions
Switching times ensured by design.
Package power dissipation is dependent on the copper pad area on the PCB.
2004 Microchip Technology Inc.
DS21421D-page 3
TC4423/TC4424/TC4425
DC CHARACTERISTICS (OVER OPERATING TEMPERATURE RANGE)
Electrical Specifications:
Unless otherwise indicated, operating temperature range with 4.5V
≤
V
DD
≤
18V.
Parameters
Input
Logic ‘1’, High Input Voltage
Logic ‘0’, Low Input Voltage
Input Current
Output
High Output Voltage
Low Output Voltage
Output Resistance, High
Output Resistance, Low
Peak Output Current
Latch-Up Protection
Withstand Reverse Current
Switching Time (Note 1)
Rise Time
Fall Time
Delay Time
Delay Time
Power Supply
Power Supply Current
I
S
—
—
2.0
0.2
3.5
0.3
mA
V
IN
= 3V (Both inputs)
V
IN
= 0V (Both inputs)
t
R
t
F
t
D1
t
D2
—
—
—
—
28
32
32
38
60
60
100
100
ns
ns
ns
ns
Figure 4-1, Figure 4-2,
C
L
= 1800 pF
Figure 4-1, Figure 4-2,
C
L
= 1800 pF
Figure 4-1, Figure 4-2,
C
L
= 1800 pF
Figure 4-1, Figure 4-2,
C
L
= 1800 pF
V
OH
V
OL
R
OH
R
OL
I
PK
I
REV
V
DD
– 0.025
—
—
—
—
—
—
—
3.7
4.3
3.0
>1.5
—
0.025
8
8
—
—
V
V
Ω
Ω
A
A
Duty cycle
≤
2%, t
≤
300 µsec
I
OUT
= 10 mA, V
DD
= 18V
I
OUT
= 10 mA, V
DD
= 18V
V
IH
V
IL
I
IN
2.4
—
–10
—
—
—
—
0.8
+10
V
V
µA
0V
≤
V
IN
≤
V
DD
Sym
Min
Typ
Max
Units
Conditions
Note 1:
Switching times ensured by design.
TEMPERATURE CHARACTERISTICS
Electrical Specifications:
Unless otherwise noted, all parameters apply with 4.5V
≤
V
DD
≤
18V.
Parameters
Temperature Ranges
Specified Temperature Range (C)
Specified Temperature Range (E)
Specified Temperature Range (V)
Maximum Junction Temperature
Storage Temperature Range
Package Thermal Resistances
Thermal Resistance, 8L-6x5 DFN
Thermal Resistance, 8L-PDIP
Thermal Resistance, 16L-SOIC
θ
JA
θ
JA
θ
JA
—
—
—
33.2
125
155
—
—
—
°C/W
°C/W
°C/W
Typical four-layer board with
vias to ground plane
T
A
T
A
T
A
T
J
T
A
0
–40
–40
—
–65
—
—
—
—
—
+70
+85
+125
+150
+150
°C
°C
°C
°C
°C
Sym
Min
Typ
Max
Units
Conditions
DS21421D-page 4
2004 Microchip Technology Inc.
TC4423/TC4424/TC4425
2.0
Note:
TYPICAL PERFORMANCE CURVES
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
100
4700 pF
80
100
4700 pF
80
t
FALL
(nsec)
t
RISE
(nsec)
60
3300 pF
2200 pF
60
3300 pF
2200 pF
40
40
20
470 pF
0
1500 pF
1000 pF
20
470 pF
0
1500 pF
1000 pF
4
6
8
10
12
V
DD
(V)
14
16
18
4
6
8
10
12
V
DD
(V)
14
16
18
FIGURE 2-1:
Voltage.
100
Rise Time vs. Supply
FIGURE 2-4:
Voltage.
100
Fall Time vs. Supply
5V
80
80
t
FALL
(nsec)
5V
t
RISE
(nsec)
60
10V
15V
60
10V
15V
40
40
20
20
0
100
1000
C
LOAD
(pF)
10,000
0
100
1000
C
LOAD
(pF)
10,000
FIGURE 2-2:
Load.
32
30
28
Time (nsec)
Rise Time vs. Capacitive
FIGURE 2-5:
Load.
100
Fall Time vs. Capacitive
C
LOAD
= 2200 pF
t
FALL
Delay Time (nsec)
80
C
LOAD
= 2200 pF
V
DD
= 10V
t
D1
26
24
22
20
18
-55
t
FALL
t
RISE
60
t
RISE
40
20
t
D2
-35
-15
5
25 45
T
A
(
°
C)
65
85
105 125
0
1
2
3
4
5 6 7
Input (V)
8
9
10 11 12
FIGURE 2-3:
Temperature.
Rise and Fall Times vs.
FIGURE 2-6:
Amplitude.
Propagation Delay vs. Input
2004 Microchip Technology Inc.
DS21421D-page 5
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