X24640S8I datasheet, PDF - EEWORLD Datasheet

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X24640S8I: Description400KHz 2-Wire Serial E 2 PROM with Block Lock; File Size83KB，17 Pages; ManufacturerXicon Passive Components; Websitehttp://www.xicor.com

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X24640S8I Overview

400KHz 2-Wire Serial E 2 PROM with Block Lock

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64K

X24640

400KHz 2-Wire Serial E

PROM with Block Lock

DESCRIPTION

8K x 8 Bit

FEATURES

•

Save Critical Data with Programmable

Block Lock Protection

—Block Lock (0, 1/4, 1/2, or all of E

PROM Array)

—Software Program Protection

—Programmable Hardware Write Protect

In Circuit Programmable ROM Mode

400KHz 2-Wire Serial Interfac

—Schmitt Trigger Input Noise Suppression

—Output Slope Control for Ground Bounce

Noise Elimination

Longer Battery Life With Lower Power

—Active Read Current Less Than 1mA

—Active Program Current Less Than 3mA

—Standby Current Less Than 1

1.8V to 3.6V, 2.5V to 5.5V and 4.5V to 5.5V

Power Supply Versions

32 Word Page Write Mode

—Minimizes Total Write Time Per Word

Internally Organized 8K x 8

Bidirectional Data Transfer Protocol

Self-Timed Write Cycle

—Typical Write Cycle Time of 5ms

High Reliability

—Endurance: 100,000 Cycles

—Data Retention: 100 Years

8-Lead SOIC

20-Lead TSSOP

8-Lead PDIP

The X24640 is a CMOS Serial E

PROM, internally

organized 8K x 8. The device features a serial inter-

face and software protocol allowing operation on a

simple two wire bus. The bus operates at 400 KHz all

the way down to 1.8V.

Three device select inputs (S

–S

) allow up to eight

devices to share a common two wire bus.

A Write Protect Register at the highest address loca-

tion, FFFFh, provides three write protection features:

Software Write Protect, Block Lock Protect, and

Programmable Hardware Write Protect. The Software

Write Protect feature prevents any nonvolatile writes to

the device until the WEL bit in the Write Protect

gives the user four array block protect options, set by

programming two bits in the Write Protect Register.

The Programmable Hardware Write Protect feature

allows the user to install the device with WP tied to

, program and Block Lock the desired portions of

the memory array in circuit, and then enable the In

Circuit Programmable ROM Mode by programming the

WPEN bit in the Write Protect Register. After this, the

Block Locked portions of the array, including the Write

Protect Register itself, are permanently protected from

being erased.

FUNCTIONAL DIAGRAM

SERIAL E

PROM DATA

AND ADDRESS (SDA)

DATA REGISTER

Y DECODE LOGIC

COMMAND

DECODE

AND

CONTROL

LOGIC

BLOCK LOCK AND

WRITE PROTECT

CONTROL LOGIC

DEVICE

SELECT

LOGIC

WRITE

PROTECT

4K x 8

SERIAL E

PROM

ARRAY

8K x 8

2K x 8

SCL

PAGE

DECODE

LOGIC

2K x 8

WRITE VOLTAGE

CONTROL

7038 FM 01

Xicor, 1995, 1996 Patents Pending

7038-1.2 4/25/97 T0/C2/D0 SH

Characteristics subject to change without notice

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Shortcut: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

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