EEWORLDEEWORLDEEWORLD

Part Number

Search
 PDF

SSB6CM100303

Description
20A, BARRIER STRIP TERMINAL BLOCK, 1 ROW, 1 DECK
CategoryThe connector    terminals   
File Size113KB,2 Pages
ManufacturerTE Connectivity
Websitehttp://www.te.com
Download Datasheet Parametric View All

SSB6CM100303 Overview

20A, BARRIER STRIP TERMINAL BLOCK, 1 ROW, 1 DECK

SSB6CM100303 Parametric

Parameter NameAttribute value
MakerTE Connectivity
Reach Compliance Codeunknown
ECCN codeEAR99
Other features94V-2, POLYPROPYLENE
Fastening methodSCREW
Manufacturer's serial numberSSB6
Installation typeBOARD
Number of layers1
Rows1
Number of channels10
Rated current20 A
Rated voltage300 V
safety certificateUL; CSA
Terminal and terminal strip typesBARRIER STRIP TERMINAL BLOCK
Wire gauge12 AWG
Development of FPGA Industry
I have been paying attention to FPGA technology recently. In the past, it was mainly 8-bit/32-bit MCU applications and ARM. I don’t know much about FPGA application technology and the market. Those wh...
Fred_1977 Talking
International semiconductor industry veteran joins Wolfson as Vice President of Global Sales
International semiconductor industry veteran joins Wolfson as Vice President of Global Sales2006-06-28  Wolfson Microelectronics Limited ("Wolfson" or "the Company"), a leading supplier of mixed-signa...
fighting Analog electronics
Designing efficient, powerful, and fast electric vehicle charging stations
As the number of electric vehicles (EVs) increases, there is a growing need worldwide to create more energy-efficient charging infrastructure systems that can charge vehicles faster than ever before. ...
alan000345 TI Technology Forum
FPGA Books
Are there any good books you can recommend for learning FPGA?...
Fred_1977 FPGA/CPLD
[RISC-V MCU CH32V103 Review] - 1: From PDF to Studio
[i=s]This post was last edited by MianQi on 2021-1-22 11:57[/i]Qinheng's materials are well done, with clear titles and clear boundaries. Opening a copy of the CH32V103 Data Sheet, the line spacing an...
MianQi Domestic Chip Exchange
Allwinner chip Tina Linux modify UART pins, UART port (1)
#### Scenario 1: Also using UART0, need to change from PF2, PF4 to PE2, PE4 1. Modify `sys_config.fex` (serial port of BOOT0 and Uboot) The path of `sys_config.fex` is `uart_debug_port` in `device/con...
aleksib Domestic Chip Exchange

Technical ResourceMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号