SLB9660XT12FW443XUMA1 datasheet, PDF

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SLB9660XT12FW443XUMA1: DescriptionTelecom Circuit,; CategoryWireless rf/communication Telecom circuit; File Size481KB，23 Pages; ManufacturerInfineon; Websitehttp://www.infineon.com/; Environmental Compliance

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SLB9660XT12FW443XUMA1 Overview

Telecom Circuit,

SLB9660XT12FW443XUMA1 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Infineon
package instruction	,
Reach Compliance Code	compliant
Factory Lead Time	15 weeks
Humidity sensitivity level	3
Telecom integrated circuit types	TELECOM CIRCUIT

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OPTIGA™ T PM

SLB 9660 TPM1.2

Data Sheet

Devices

•

SLB 9660VQ1.2

SLB 9660XQ1.2

SLB 9660TT1.2

SLB 9660XT1.2

Key Features

•

Compliant to TPM Main Specification, Version 1.2, Rev. 116 (see

[3])

Low Pin Count (LPC) interface

Approved for Google Chromebook / Chromebox

PG-VQFN-32-13 or PG-TSSOP-28-2 package

Standard (-20°C to +85°C) and enhanced temperature range (-40°C to +85°C)

Optimized for battery operated devices: low standby power consumption (typ. 150μA)

24 PCRs

6 kByte free NV memory

Up to 10 concurrent sessions

Up to eight 2048-bit keys can be loaded into volatile storage

16 slots for keys of up to 2048-bit

8 monotonic counters

1280 Byte I/O buffer

Built-in support by Linux Kernel

About this document

Scope and purpose

This data sheet describes the OPTIGA™ TPM SLB 9660 TPM1.2 Trusted Platform Module together with its

features, functionality and programming interface.

Intended audience

This data sheet is primarily intended for system developers.

Data Sheet

www.infineon.com

Please read the Important Notice and Warnings at the end of this document

Revision 1.2

2018-09-21

OPTIGA™ TPM

SLB 9660 TPM1.2

Table of contents

Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

List of figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

List of tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.1

2.2

2.3

2.4

4.1

5.1

5.2

5.3

5.4

5.5

6.1

6.2

6.3

7.1

7.2

7.3

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

LPC Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

SYNC Field Usage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Localities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

LPC Access Rights . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Device Types / Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Typical Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Functional Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package Dimensions (TSSOP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Packing Type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Recommended Footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chip Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package Dimensions (VQFN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Packing Type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Recommended Footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chip Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Data Sheet

Revision 1.2

2018-09-21

OPTIGA™ TPM

SLB 9660 TPM1.2

List of tables

Table 1

Table 2

Table 3

Table 4

Table 5

Table 6

Table 7

Table 8

Table 9

Table 10

Table 11

Table 12

LT Register Access Matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Device Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Buffer Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

I/O Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Not Connected . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Functional Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

DC Characteristics for non-LPC Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

DC Characteristics for LPC Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Data Sheet

Revision 1.2

2018-09-21

OPTIGA™ TPM

SLB 9660 TPM1.2

Overview

The OPTIGA™ TPM SLB 9660 is a Trusted Platform Module and is based on advanced hardware security

technology. This TPM implementation has achieved CC EAL4+ certification and serves as a basis for other TPM 1.2

products and firmware upgrades. It is available in different packages, see

Table 2.

It supports the LPC interface

and interrupts are communicated with the serial interrupt (SERIRQ) protocol.

LPC Interface

The OPTIGA™ TPM SLB 9660 features the Low Pin Count (LPC) interface (for a specification, please refer to

[1]).

From the cycle types defined in the mentioned specification, only the TPM-type cycles (read and write) are

supported. All accesses with different cycle types are ignored by the device.

2.1

SYNC Field Usage

Since the legacy interface is not supported anymore, the OPTIGA™ TPM SLB 9660 will never generate SYNC

ERRORs on the LPC. It will either acknowledge a cycle with SYNC OK or use a “Long Wait” SYNC field to enlarge a

cycle (that means, inserting wait states on the bus).

2.2

Localities

The interface explicitly does not support standard IO cycles (read and write). This implies that IO-mapped

addressing of the device is not possible; only accesses via the locality-based TPM-type cycles are possible which

also means that “locality none” as defined in

[4]

is not supported as well.

For a detailed description of the locality addressing scheme and the registers located in each locality, please refer

[4]

as well.

2.3

Power Management

The OPTIGA™ TPM SLB 9660 does not support the LPC power down signal (signal LPCPD) or the clock run

protocol (signal CLKRUN). Power management is handled internally; no explicit power-down or standby mode is

available. The device automatically enters a low-power state after each successful command/response

transaction. If a transaction is started on the LPC bus from the host platform, the device will wake immediately

and will return to the low-power mode after the transaction has been finished.

2.4

LPC Access Rights

The registers located in the address space of the OPTIGA™ TPM SLB 9660 are described in the respective TCG

document (please refer to

[4]).

The registers READFIFO and WRITEFIFO mentioned in

Table 1

below refer to the

DATAFIFO register, the names are used to state whether this register is read or written.

Each register has its own access rights which describe if the register is updated on a write or can be read if the

associated ACTIVE.LOCALITY is set respectively not set. If the access cycle is not accepted by the TPM, it will be

master aborted (no LPC SYNC cycle will be generated and no action is done on the internal registers).

Table 1

shows which operation is done by the TPM on each register depending on the ACTIVE.LOCALITY bit.

Note:

Table 1,

“abort” means that no valid SYNC is generated when a cycle is seen by the interface which

shall be aborted. The data present in an aborted write access cycle does not change the addressed

Data Sheet

Revision 1.2

2018-09-21

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