CHT-7474-CDIL14-T datasheet, PDF

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CHT-7474-CDIL14-T: DescriptionD Flip-Flop, TTL/H/L Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, TTL, CDIP16, HERMETIC SEALED, CERAMIC, DIP-16; Categorylogic logic; File Size273KB，11 Pages; ManufacturerCissoid S A; Environmental Compliance

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CHT-7474-CDIL14-T Overview

D Flip-Flop, TTL/H/L Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, TTL, CDIP16, HERMETIC SEALED, CERAMIC, DIP-16

CHT-7474-CDIL14-T Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Cissoid S A
Parts packaging code	DIP
package instruction	DIP,
Contacts	16
Reach Compliance Code	unknown
series	TTL/H/L
JESD-30 code	R-CDIP-T16
JESD-609 code	e4
length	18.99 mm
Logic integrated circuit type	D FLIP-FLOP
Number of digits	1
Number of functions	2
Number of terminals	16
Output polarity	COMPLEMENTARY
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
propagation delay (tpd)	45 ns
Maximum seat height	3.36 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	2.97 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	NO
technology	TTL
Terminal surface	GOLD
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Trigger type	POSITIVE EDGE
width	7.62 mm
minfmax	16 MHz
Base Number Matches	1

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The Leader in High Temperature

Semiconductor Solutions

CHT-7474 DATASHEET

High-Temperature, Dual D-Flip-Flop

General Description

The CHT-7474 is a dual positive-edge-

triggered D type Flip-flop. Data on the D

input is transferred to the output on a rising

edge of the clock impulse.

Rn and Sn are asynchronous reset and set.

On a low state, they operate on the outputs

regardless of the other inputs.

This circuit is designed assuring latchup-

free operation for all supply and tempera-

ture conditions.

The CHT-7474 can operate with supply

voltages from 3.3 to 5V (±10%).

Revision: 03.3

1-Oct-12

(Last Modified Date)

Features



Qualified from -55 to +225°C (Tj)

3.3 to 5V (±10%) supply voltages

Latchup-free at any supply and tem-

perature condition

Validated at 225°C for 30000 hours

(CDIL14) and 20000 hours (CSOIC16)

(and still on-going)



Available in DIL14and CSOIC16 her-

metic standard package

Applications



Well logging,

Automotive, Aeronautics & Aerospace

Harsh Environments

Package and Pin Configuration

DIL14

Rn1

Sn1

Qn1

VSS

Symbol

RN1

SN1

QN1

GND

QN2

SN2

RN2

VDD

Description

Reset of D-flip-flop 1

Input of D-flip-flop 1

Clock pulse of D-flip-flop 1

Set of D-flip-flop 1

Output of D-flip-flop 1

Inverted output of D-flip-flop 1

Circuit core ground terminal.

Inverted output of D-flip-flop 2

Output of D-flip-flop 2

Set of D-flip-flop 2

Clock pulse of D-flip-flop 2

Input of D-flip-flop 2

Reset of D-flip-flop 2

Circuit core power supply terminal.

VDD

Rn2

Sn2

Qn2

PUBLIC

Doc. DS-080211 V03.3

WWW.CISSOID.COM

1 of 11

CHT-7474-CDIL14-T Related Products

	CHT-7474-CDIL14-T	CHT-7474-CSOIC16-T
Description	D Flip-Flop, TTL/H/L Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, TTL, CDIP16, HERMETIC SEALED, CERAMIC, DIP-16	D Flip-Flop, TTL/H/L Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, TTL, CDSO16, HERMETIC SEALED, CERAMIC, SOIC-16
Is it Rohs certified?	conform to	conform to
Maker	Cissoid S A	Cissoid S A
Parts packaging code	DIP	SOIC
package instruction	DIP,	SOIC-16
Contacts	16	16
Reach Compliance Code	unknown	unknown
series	TTL/H/L	TTL/H/L
JESD-30 code	R-CDIP-T16	R-CDSO-G16
JESD-609 code	e4	e4
length	18.99 mm	10.45 mm
Logic integrated circuit type	D FLIP-FLOP	D FLIP-FLOP
Number of digits	1	1
Number of functions	2	2
Number of terminals	16	16
Output polarity	COMPLEMENTARY	COMPLEMENTARY
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP	SOP
Package shape	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED
propagation delay (tpd)	45 ns	45 ns
Maximum seat height	3.36 mm	2.365 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V
Minimum supply voltage (Vsup)	2.97 V	2.97 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V
surface mount	NO	YES
technology	TTL	TTL
Terminal surface	GOLD	GOLD
Terminal form	THROUGH-HOLE	GULL WING
Terminal pitch	2.54 mm	1.27 mm
Terminal location	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED
Trigger type	POSITIVE EDGE	POSITIVE EDGE
width	7.62 mm	7.45 mm
minfmax	16 MHz	16 MHz
Base Number Matches	1	1

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