Philips Semiconductors
Product specification
Gates
74F10 Triple 3-input NAND gate
74F11 Triple 3-input AND gate
TYPE
74F10
74F11
TYPICAL
PROPAGATION
DELAY
3.5ns
4.2ns
TYPICAL
SUPPLY CURRENT
(TOTAL)
3.3mA
5.3mA
14-pin plastic DIP
14-pin plastic SO
74F10, 74F11
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V
±10%,
T
amb
= 0°C to +70°C
N74F10N, N74F11N
N74F10D, N74F11D
PKG DWG #
SOT27-1
SOT108-1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
Dna, Dnb, Dnc
Qn
Qn
Data inputs
Data output (74F10)
Data output (74F11)
DESCRIPTION
74F (U.L.) HIGH/LOW
1.0/1.0
50/33
50/33
LOAD VALUE HIGH/LOW
20µA/0.6mA
1.0mA/20mA
1.0mA/20mA
NOTE:
One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
PIN CONFIGURATIONS
74F10
D0a
D0b
D1a
D1b
D1c
Q1
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
D0c
Q0
D2c
D2b
D2a
Q2
D0a
D0b
D1a
D1b
D1c
Q1
GND
1
2
3
4
5
6
7
74F11
14
13
12
11
10
9
8
V
CC
D0c
Q0
D2c
D2b
D2a
Q2
SF00055
SF00056
LOGIC SYMBOLS
74F10
1
2
13
3
4
5
9
10
11
1
2
13
74F11
3
4
5
9
10
11
D0a
D0b D0c D1a
D1b
D1c
D2a
D2b
D2c
D0a
D0b D0c D1a
D1b
D1c
D2a
D2b
D2c
Q0
Q1
Q2
Q0
Q1
Q2
V
CC
= Pin 14
GND = Pin 7
12
6
8
V
CC
= Pin 14
GND = Pin 7
12
6
8
SF00057
SF00058
September 20, 1989
2
853–0329 97683
Philips Semiconductors
Product specification
Gates
74F10, 74F11
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
V
CC
V
IN
I
IN
V
OUT
I
OUT
T
amb
T
stg
Supply voltage
Input voltage
Input current
Voltage applied to output in High output state
Current applied to output in Low output state
Operating free-air temperature range
Storage temperature range
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
–0.5 to V
CC
40
0 to +70
–65 to +150
UNIT
V
V
mA
V
mA
°C
°C
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
V
CC
V
IH
V
IL
I
IK
I
OH
I
OL
T
amb
Supply voltage
High-level input voltage
Low-level input voltage
Input clamp current
High-level output current
Low-level output current
Operating free air temperature range
0
PARAMETER
MIN
4.5
2.0
0.8
–18
–1
20
+70
NOM
5.0
MAX
5.5
V
V
V
mA
mA
mA
°C
UNIT
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST CONDITIONS
1
V
CC
= MIN, V
IL
= MAX
V
IH
= MIN, I
OH
= MAX
Low-level
Low level output voltage
Input clamp voltage
Input current at maximum input voltage
High-level input current
Low-level input current
Short-circuit output current
3
74F10
I
CC
Supply current (total)
74F11
I
CCH
I
CCL
I
CCH
I
CCL
V
CC
= MIN, V
IL
= MAX
V
IH
= MIN, I
Ol
= MAX
V
CC
= MIN, I
I
= I
IK
V
CC
= MAX, V
I
= 7.0V
V
CC
= MAX, V
I
= 2.7V
V
CC
= MAX, V
I
= 0.5V
V
CC
= MAX
V
CC
= MAX
V
IN
= GND
V
IN
= 4.5V
V
IN
= 4.5V
V
IN
= GND
–60
1.8
6.0
4.7
7.2
±10%V
CC
±5%V
CC
±10%V
CC
±5%V
CC
LIMITS
MIN
2.5
2.7
3.4
0.35
0.35
–0.73
0.50
0.50
–1.2
100
20
–0.6
–150
2.1
7.7
6.2
9.7
mA
V
µA
µA
mA
mA
mA
V
TYP
2
MAX
UNIT
V
O
OH
High level output voltage
High-level
V
V
O
OL
V
IK
I
I
I
IH
I
IL
I
OS
V
CC
= MAX
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
CC
= 5V, T
amb
= 25°C.
3. Not more than one output should be shorted at a time. For testing I
OS
, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
OS
tests should be performed last.
September 20, 1989
4
Philips Semiconductors
Product specification
Gates
74F10, 74F11
AC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
V
CC
= +5.0V
T
amb
= +25°C
C
L
= 50pF, R
L
= 500Ω
MIN
t
PLH
t
PHL
t
PLH
t
PHL
Propagation delay
Dna, Dnb, Dnc to Qn
Propagation delay
Dna, Dnb, Dnc to Qn
74F10
74F11
Waveform 1
Waveform 2
2.4
1.5
3.0
2.5
TYP
3.7
3.2
4.2
4.1
MAX
5.0
4.3
5.6
5.5
V
CC
= +5.0V
±
10%
T
amb
= 0°C to +70°C
C
L
= 50pF, R
L
= 500Ω
MIN
2.4
1.5
3.0
2.5
MAX
6.0
5.3
6.6
6.5
ns
ns
UNIT
AC WAVEFORMS
For all waveforms, V
M
= 1.5V.
Dna, Dnb, Dnc
V
M
t
PHL
V
M
t
PLH
Dna, Dnb, Dnc
V
M
t
PLH
V
M
t
PHL
Qn
V
M
V
M
Qn
V
M
V
M
SF00064
SF00063
Waveform 1. Propagation Delay for Inverting Outputs
(74F10)
Waveform 2. Propagation Delay for Non-Inverting Outputs
(74F11)
TEST CIRCUIT AND WAVEFORM
V
CC
NEGATIVE
PULSE
V
IN
PULSE
GENERATOR
R
T
D.U.T.
V
OUT
90%
V
M
10%
t
THL (
t
f
)
C
L
R
L
t
w
V
M
10%
t
TLH (
t
r
)
0V
90%
AMP (V)
t
TLH (
t
r
)
90%
POSITIVE
PULSE
V
M
10%
t
w
t
THL (
t
f
)
AMP (V)
90%
V
M
10%
0V
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
R
L
= Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
C
L
= Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
Input Pulse Definition
INPUT PULSE REQUIREMENTS
family
amplitude V
M
74F
3.0V
1.5V
rep. rate
1MHz
t
w
500ns
t
TLH
2.5ns
t
THL
2.5ns
SF00006
September 20, 1989
5