OC-32-2548AT datasheet, PDF - EEWORLD Datasheet

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OC-32-2548AT: Description3.2X2.5X1.2mm / SMD / HCMOS/TTL Oscillator; File Size34KB，1 Pages; ManufacturerETC

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OC-32-2548AT Overview

3.2X2.5X1.2mm / SMD / HCMOS/TTL Oscillator

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OC-32 Series

3.2X2.5X1.2mm / SMD / HCMOS/TTL Oscillator

Lead-Free

RoHS Compliant

C A L I B E R

Electronics Inc.

PART NUMBERING GUIDE

Package

OC-32

= 3.3Vdc

OC-32A = 1.8Vdc

OC-32B = 2.5Vdc

Inclusive Stability

100= +/-100ppm, 50= +/-50ppm, 30= +/-30ppm, 25= +/-25ppm,

20= +/-20ppm

Environmental/Mechanical Specifications on page F5

OC-32A- 100 48 A T - 30.000MHz

Pin One Connection

T = Tri State Enable High

Output Symmetry

Blank = 40/60%, A = 45/55%

Operating Temperature Range

Blank = -10°C to 70°C, 27 = -20°C to 70°C, 48 = -40°C to 85°C

ELECTRICAL SPECIFICATIONS

Frequency Range

Operating Temperature Range

Storage Temperature Range

Supply Voltage

Input Current

1.544MHz to 32.000MHz

and 32.768kHz

36,001MHz to 70.000MHz

70.001MHz to 125.000MHz

Inclusive of Operating Temperature Range, Supply

Voltage and Load

w/HCMOS or TTL Load

wHCMOS or TTL Load

Revision: 2006-C

1.544MHz to 80.000MHz /

32.768kHz (@ 3.3V)

-10°C to 70°C / -20°C to 70°C / -40°C to 85°C

-55°C to 125°C

A=1.8Vdc / B=2.5Vdc / BLANK=3.3Vdc ±10%

2mA Maximum

3mA Maximum

4mA Maximum

(3.3v, 2.5v, 1.8v)

Frequency Tolerance / Stability

Output Voltage Logic High (Voh)

Output Voltage Logic Low (Vol)

Rise / Fall Time

Duty Cycle

Load Drive Capability

Pin 1 Tristate Function

Aging (@ 25°C)

Start Up Time

Absolute Clock Jitter

One Sigma Clock Jitter

±100ppm, ±50ppm, ±30ppm, ±25ppm, ±20ppm,

(±50ppm for 32.768kHz only)

90% of Vdd Min. / Ioh=-8mA

10% of Vdd Max. / Iol=8mA

10% to 90% of Waveform w/HCMOS Load; 0.4Vdc to 2.4V w/TTL Load / 6nSec Max.

@1.4Vdc w/TTL Load; @50% w/HCMOS Load

@1.4Vdc w/TTL Load or w/HCMOS Load

50 ±10% (Standard)

50±5% (Optional)

15pF HCMOS Load

Pin 1 = H or Open / Output Active at pin 3

Pin 1 = L / High Impedance at pin 3

±5ppm / year Maximum

10mSeconds Maximum

±250pSeconds Maximum

±50pSeconds Maximum

NOTE: A 0.01uF bypass capacitor should be placed between Vdd (Pin 4) and GND (Pin 2) to minimize power supply line noise.

MECHANICAL DIMENSIONS

Recommended Solder Pattern

0.95

Marking Guide

2.5

± 0.15

Metal

0.9

±0.2

(X4 plcs.)

All Dimensions in mm.

2.20

±0.15

Line 1: A, B or Blank - Frequency

Line 2: CEI YM

A = Voltage designator

CEI = Caliber Electronics Inc.

YM = Date Code (Year / Month)

1.20

3.2

± 0.15

2.2

Ceramic

1.75

1.2

Max

1.00±

0.15

Pin 1: Tri-State

Pin 2: Case Ground

Pin 3: Output

Pin 4: Supply Voltage (3.3v, 2.5v, 1.8v)

TEL

949-366-8700

FAX

949-366-8707

WEB

http://www.caliberelectronics.com

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