EEWORLDEEWORLDEEWORLD

Part Number

Search
 PDF

51741-30014011CCLF

Description
Board Connector, 151 Contact(s), 4 Row(s), Female, Straight, Press Fit Terminal, Receptacle, LEAD FREE
CategoryThe connector    The connector   
File Size227KB,3 Pages
ManufacturerAmphenol
Websitehttp://www.amphenol.com/
Environmental Compliance
Download Datasheet Parametric View All

51741-30014011CCLF Overview

Board Connector, 151 Contact(s), 4 Row(s), Female, Straight, Press Fit Terminal, Receptacle, LEAD FREE

51741-30014011CCLF Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
package instructionLEAD FREE
Reach Compliance Codecompliant
Other featuresTERMINAL PITCH FOR POWER CONTACTS: 6.35 MM
Body/casing typeRECEPTACLE
Connector typeBOARD CONNECTOR
Contact to complete cooperationGOLD (30) OVER NICKEL (50)
Contact completed and terminatedGOLD (5) OVER NICKEL (50)
Contact point genderFEMALE
Contact materialCOPPER ALLOY
DIN complianceNO
Filter functionNO
IEC complianceNO
JESD-609 codee4
MIL complianceNO
Manufacturer's serial number51741
Mixed contactsYES
Installation methodSTRAIGHT
Installation typeBOARD
Number of rows loaded4
OptionsGENERAL PURPOSE
Terminal pitch2.54 mm
Termination typePRESS FIT
Total number of contacts151
UL Flammability Code94V-0
Base Number Matches1
About USB2.0 plug-in and switch
Can I use a high-speed analog switch such as TS3USB31 to switch DM/DP? According to the 3.0 protocol, the complete insertion/removal process needs to detect the VBus timing, and if only the data line ...
Ejack1979 Integrated technical exchanges
[Atria AT32WB415 Series Bluetooth BLE 5.0 MCU] + Bluetooth communication
[Atria AT32WB415 Series Bluetooth BLE 5.0 MCU] + Bluetooth communicationBluetooth BLE Application NotesAfter checking the official website, I found the Bluetooth manual and started to learn and unders...
雨夜很凉快 RF/Wirelessly
xilinx vivado xdc constraint syntax
1. Purpose of Constraints Introduce the principle of FPGA constraints, understand that the purpose of constraints is to serve the design, to ensure that the design meets the timing requirements, and t...
zxopenljx EE_FPGA Learning Park
[AT-START-F403A Evaluation] VI. FreeRTOS system based on IAR security library (sLib) secondary development mode practice
[i=s]This post was last edited by uuxz99 on 2020-10-22 21:47[/i]In the process of implementing the slib function in the previous evaluation, due to the IAR crash problem, a compromise method was used ...
uuxz99 Domestic Chip Exchange
About the 2021 E-Sports Championship
[i=s]This post was last edited by Jacktang on 2021-8-9 08:26[/i]1. Notice on the designated devices for the sponsors of the 2021 TI Cup National Undergraduate Electronic Design Competition2. To ensure...
Jacktang Electronics Design Contest

Technical ResourceMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号