CD40107BEX datasheet, PDF - EEWORLD Datasheet

CD40107BEX: DescriptionIC,LOGIC GATE,DUAL 2-INPUT NAND,CMOS,DIP,8PIN,PLASTIC; Categorylogic logic; File Size1MB，38 Pages; ManufacturerRenesas Electronics Corporation; Websitehttps://www.renesas.com/

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CD40107BEX Overview

IC,LOGIC GATE,DUAL 2-INPUT NAND,CMOS,DIP,8PIN,PLASTIC

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
package instruction	DIP, DIP8,.3
Reach Compliance Code	not_compliant
JESD-30 code	R-PDIP-T8
JESD-609 code	e0
Load capacitance (CL)	50 pF
Logic integrated circuit type	NAND GATE
MaximumI(ol)	0.014 A
Number of terminals	8
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	OPEN-DRAIN
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP8,.3
Package shape	RECTANGULAR
Package form	IN-LINE
power supply	5/15 V
Prop。Delay @ Nom-Sup	200 ns
Schmitt trigger	NO
surface mount	NO
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Base Number Matches	1

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