FDS6898A
OCTOBER 2001
FDS6898A
Dual N-Channel Logic Level PWM Optimized PowerTrench
®
MOSFET
General Description
These N-Channel Logic Level MOSFETs are produced
using
Fairchild
Semiconductor’s
advanced
PowerTrench process that has been especially tailored
to minimize the on-state resistance and yet maintain
superior switching performance.
These devices are well suited for low voltage and
battery powered applications where low in-line power
loss and fast switching are required.
Features
•
9.4 A, 20 V
R
DS(ON)
= 14 mΩ @ V
GS
= 4.5 V
R
DS(ON)
= 18 mΩ @ V
GS
= 2.5 V
•
Low gate charge (16 nC typical)
•
High performance trench technology for extremely
low R
DS(ON)
•
High power and current handling capability
D2
D
D2
D
D
D1
D1
D
5
6
7
Q1
4
3
2
Q2
SO-8
Pin 1
SO-8
G2
S2
S
G1
S1
G
S
8
1
S
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
P
D
Drain-Source Voltage
Gate-Source Voltage
Drain Current
– Continuous
– Pulsed
T
A
=25 C unless otherwise noted
o
Parameter
Ratings
20
±
12
(Note 1a)
Units
V
V
A
W
9.4
38
2
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
(Note 1c)
1.6
1
0.9
–55 to +150
°C
T
J
, T
STG
Operating and Storage Junction Temperature Range
Thermal Characteristics
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
78
40
°C/W
°C/W
Package Marking and Ordering Information
Device Marking
FDS6898A
Device
FDS6898A
Reel Size
13’’
Tape width
12mm
Quantity
2500 units
©2001
Fairchild Semiconductor Corporation
FDS6898A Rev C (W)
FDS6898A
Electrical Characteristics
Symbol
BV
DSS
∆BV
DSS
∆T
J
I
DSS
I
GSSF
I
GSSR
T
A
= 25°C unless otherwise noted
Parameter
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
(Note 2)
Test Conditions
V
GS
= 0 V,
I
D
= 250
µA
I
D
= 250
µA,
Referenced to 25°C
V
DS
= 16 V,
V
GS
= 12 V,
V
GS
= 0 V
V
DS
= 0 V
Min
20
Typ
Max Units
V
mV/°C
1
100
–100
µA
nA
nA
Off Characteristics
21
V
GS
= –12 V, V
DS
= 0 V
V
DS
= V
GS
,
I
D
= 250
µA
I
D
= 250
µA,
Referenced to 25°C
V
GS
= 4.5 V, I
D
= 9.4 A
V
GS
= 2.5 V, I
D
= 8.3 A
V
GS
= 4.5 V, I
D
= 9.4 A,T
J
= 125°C
V
GS
= 4.5V,
V
DS
= 5 V
V
DS
= 5 V,
I
D
= 9.4 A
On Characteristics
V
GS(th)
∆V
GS(th)
∆T
J
R
DS(on)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
On–State Drain Current
Forward Transconductance
0.5
1
–3.5
10
13
14
1.5
V
mV/°C
mΩ
14
18
21
I
D(on)
g
FS
19
47
A
S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
(Note 2)
V
DS
= 10 V,
f = 1.0 MHz
V
GS
= 0 V,
1821
440
208
pF
pF
pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
V
DD
= 10 V,
V
GS
= 4.5 V,
I
D
= 1 A,
R
GEN
= 6
Ω
10
15
34
16
20
27
55
29
23
ns
ns
ns
ns
nC
nC
nC
V
DS
= 10 V,
V
GS
= 4.5 V
I
D
= 9.4 A,
16
3
4
Drain–Source Diode Characteristics and Maximum Ratings
I
S
V
SD
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
Voltage
V
GS
= 0 V,
I
S
= 1.3 A
(Note 2)
1.3
0.7
1.2
A
V
Notes:
1.
R
θJA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
θJC
is guaranteed by design while R
θCA
is determined by the user's board design.
a) 78°C/W when
2
mounted on a 0.5in
pad of 2 oz copper
b) 125°C/W when
mounted on a 0.02
2
in pad of 2 oz
copper
c) 135°C/W when mounted on a
minimum mounting pad.
Scale 1 : 1 on letter size paper
2.
Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
3.
The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied
FDS6898A Rev C (W)
FDS6898A
Typical Characteristics
40
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
V
GS
= 4.5V
I
D
, DRAIN CURRENT (A)
3.0V
2.5V
30
2.2
2
V
GS
= 2.0V
1.8
1.6
1.4
1.2
1
0.8
0
0.5
1
1.5
2
0
10
20
I
D
, DRAIN CURRENT (A)
30
40
V
DS
, DRAIN-SOURCE VOLTAGE (V)
20
2.0V
2.5V
3.0V
4.0V
4.5V
10
0
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.038
R
DS(ON)
, ON-RESISTANCE (OHM)
I
D
= 4.7A
0.03
1.6
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
I
D
= 9.4A
V
GS
= 4.5V
1.4
1.2
0.022
T
A
= 125
o
C
0.014
T
A
= 25 C
0.006
o
1
0.8
0.6
-50
-25
0
25
50
75
100
o
125
150
1
2
3
4
5
T
J
, JUNCTION TEMPERATURE ( C)
V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with
Temperature.
40
V
DS
= 5V
I
D
, DRAIN CURRENT (A)
30
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
100
I
S
, REVERSE DRAIN CURRENT (A)
T
A
= -55
o
C
25 C
125 C
o
o
V
GS
= 0V
10
T
A
= 125
o
C
1
25
o
C
20
0.1
-55 C
o
0.01
0.001
0.0001
10
0
0.5
1
1.5
2
2.5
V
GS
, GATE TO SOURCE VOLTAGE (V)
0
0.2
0.4
0.6
0.8
1
1.2
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS6898A Rev C (W)
Typical Characteristics
10
V
GS
, GATE-SOURCE VOLTAGE (V)
I
D
= 9.4A
8
CAPACITANCE (pF)
15V
6
V
DS
= 5V
10V
2500
f = 1MHz
V
GS
= 0 V
2000
C
ISS
1500
4
1000
C
OSS
2
500
C
RSS
0
0
5
10
15
20
25
30
35
Q
g
, GATE CHARGE (nC)
0
0
5
10
15
20
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
100
R
DS(ON)
LIMIT
I
D
, DRAIN CURRENT (A)
10
100ms
1s
10s
DC
V
GS
= 10V
SINGLE PULSE
R
θJA
= 135
o
C/W
T
A
= 25 C
0.01
0.01
o
Figure 8. Capacitance Characteristics.
40
100µs
1ms
10ms
P(pk), PEAK TRANSIENT POWER (W)
SINGLE PULSE
R
θJA
=135°C/W
T
A
= 25°C
30
1
20
0.1
10
0
0.1
1
10
100
0.001
0.01
0.1
1
10
100
V
DS
, DRAIN-SOURCE VOLTAGE (V)
t
1
, TIME (sec)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
1
D = 0.5
0.2
R
θJA
(t) = r(t) * R
θJA
R
θJA
= 135 °C/W
0.1
0.1
0.05
0.02
P(pk)
t
1
t
2
SINGLE PULSE
0.01
0.01
T
J
- T
A
= P * R
θJA
(t)
Duty Cycle, D = t
1
/ t
2
0.001
0.0001
0.001
0.01
0.1
t , TIME (sec)
1
10
100
1000
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDS6898A Rev C (W)
SOIC-8 Tape and Reel Data
SOIC(8lds) Packaging
Configuration:
Figure 1.0
ATTENTION
OBSER PRECAUTIONS
VE
FOR HANDLING
ELECTROSTATIC
SENSITIVE
DEVICES
N
NT IO
NS
AT TE
RVE PR ECAUTIO
G
OBSE
DLIN
H AN
IC
FOR
STAT
TRO
ELEC
ITIVE
SENS
ES
DEVIC
Packaging Description:
SOIC-8 parts are shipped in tape. The carrier tape is
made from a dissipative (carbon filled) polycarbonate
resin. The cover tape is a multilayer film (Heat Activated
Adhesive in nature) primarily composed of polyester film,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standard option are shipped with
2,500 units per 13” or 330cm diameter reel. The reels are
dark blue in color and is made of polystyrene plastic (anti-
static coated). Other option comes in 500 units per 7” or
177cm diameter reel. This and some other options are
further described in the Packaging Information table.
These full reels are individually barcode labeled and
placed inside a standard intermediate box (illustrated in
figure 1.0) made of recyclable corrugated brown paper.
One box contains two reels maximum. And these boxes
are placed inside a barcode labeled shipping box which
comes in different sizes depending on the number of parts
shipped.
Embossed ESD Marking
Antistatic Cover Tape
Static Dissipative
Embossed Carrier Tape
F63TNR
Label
Customized
Label
F852
NDS
9959
F852
NDS
9959
F852
NDS
9959
F852
NDS
9959
SOIC (8lds) Packaging Information
Packaging Option
Packaging type
Qty per Reel/Tube/Bag
Reel Size
Box Dimension (mm)
Max qty per Box
Weight per unit(gm)
Weight per Reel (kg)
Note/Comments
Standard
(no flow code)
TNR
2,500
13” Dia
355x333x40
5,000
0.0774
0.6060
L86Z
Rail/Tube
95
-
530x130x83
30,000
0.0774
-
F011
TNR
4,000
13” Dia
355x333x40
8,000
0.0774
0.9696
D84Z
TNR
500
7” Dia
193x183x80
2,000
0.0774
0.1182
F852
NDS
9959
Pin 1
SOIC-8 Unit Orientation
Barcode Label
Barcode
Label
Barcode
Label
355mm x 333mm x 40mm
Intermediate container for 13” reel option
Barcode Label sample
193mm x 183mm x 80mm
Pizza Box for Standard Option
SOIC(8lds)Tape
Leader and Trailer
Configuration:
Figure 2.0
CBVK741B019
FDS9953A
FSID: FDS9953A
LOT: CBVK741B019
3000
QTY: 2500
SPEC:
(F63T NR)
D/C1: Z9842AB QTY1:
SPEC REV:
D/C2:
QTY2:
CPN:
FAIRCHILD SEMICONDUCTOR CORPORATION
Carrier Tape
Cover Tape
Components
Tr ailer Ta pe
640mm minimum or
80 empty pockets
Leader Tape
1680mm minimum or
210 empty pockets
©2001 Fairchild Semiconductor Corporation
June 2001, Rev. C1
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