2305M-1HT datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > semiconductor> logic> 2305M-1HT

2305M-1HT: Description2305 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8; Categorysemiconductor logic; File Size144KB，12 Pages; ManufacturerIDT (Integrated Device Technology, Inc.); Websitehttp://www.idt.com/

Download Datasheet Parametric Compare View All

2305M-1HT Overview

2305 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8

2305M-1HT Parametric

Parameter Name	Attribute value
Number of functions	1
Number of terminals	8
Maximum operating temperature	85 Cel
Minimum operating temperature	-40 Cel
Maximum supply/operating voltage	3.6 V
Minimum supply/operating voltage	3 V
Rated supply voltage	3.3 V
Processing package description	0.150 INCH, LEAD FREE, SOIC-8
Lead-free	Yes
EU RoHS regulations	Yes
state	ACTIVE
Craftsmanship	CMOS
packaging shape	RECTANGULAR
Package Size	SMALL OUTLINE
surface mount	Yes
Terminal form	GULL WING
Terminal spacing	1.27 mm
terminal coating	MATTE TIN
Terminal location	DUAL
Packaging Materials	PLASTIC/EPOXY
Temperature level	INDUSTRIAL
series	2305
Output characteristics	3-ST
Enter conditions	STANDARD
Logic IC type	PLL BASED CLOCK DRIVER
Number of inverted outputs	0.0
Real output number	4
Maximum same-side bending	0.2500 ns
Max-Min frequency	133 MHz

Preview

Download Datasheet

View All

IDT2305

3.3V ZERO DELAY CLOCK BUFFER

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

3.3V ZERO DELAY

CLOCK BUFFER

IDT2305

FEATURES:

•

Phase-Lock Loop Clock Distribution

10MHz to 133MHz operating frequency

Distributes one clock input to one bank of five outputs

Zero Input-Output Delay

Output Skew < 250ps

Low jitter <200 ps cycle-to-cycle

IDT2305-1 for Standard Drive

IDT2305-1H for High Drive

No external RC network required

Operates at 3.3V V

Power down mode

Available in SOIC/TSSOP packages

DESCRIPTION:

The IDT2305 is a high-speed phase-lock loop (PLL) clock buffer,

designed to address high-speed clock distribution applications. The zero

delay is achieved by aligning the phase between the incoming clock and

the output clock, operable within the range of 10 to 133MHz.

The IDT2305 is an 8-pin version of the IDT2309. IDT2305 accepts one

reference input, and drives out five low skew clocks. The -1H version of this

device operates, up to 133MHz frequency and has a higher drive than the

-1 device. All parts have on-chip PLLs which lock to an input clock on the

REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT

pad. In the absence of an input clock, the IDT2305 enters power down. In

this mode, the device will draw less than 25

µA,

the outputs are tri-stated,

and the PLL is not running, resulting in a significant reduction of power.

The IDT2305 is characterized for both Industrial and Commercial

operation.

FUNCTIONAL BLOCK DIAGRAM

CLKOUT

PLL

REF

Control

Logic

CLK1

CLK2

CLK3

CLK4

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

2012

Integrated Device Technology, Inc.

AUGUST 2012

DSC 5174/8

2305M-1HT Related Products

	2305M-1HT	2305MI-1	2305M-1	2305M-1T	2305M-1H	2305MI-1HT	2305MI-1H	2305MI-1T	ICS2305
Description	2305 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8	2305 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8	2305 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8	2305 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8	2305 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8	2305 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8	2305 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8	2305 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8	3.3 VOLT ZERO DELAY, LOW SKEW BUFFER
Number of functions	1	1	1	1	1	1	1	1	-
Number of terminals	8	8	8	8	8	8	8	8	-
Maximum operating temperature	85 Cel	85 Cel	85 Cel	85 Cel	85 Cel	85 Cel	85 Cel	85 Cel	-
Minimum operating temperature	-40 Cel	-40 Cel	-40 Cel	-40 Cel	-40 Cel	-40 Cel	-40 Cel	-40 Cel	-
Maximum supply/operating voltage	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	-
Minimum supply/operating voltage	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V	-
Rated supply voltage	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	-
Processing package description	0.150 INCH, LEAD FREE, SOIC-8	0.150 INCH, LEAD FREE, SOIC-8	0.150 INCH, LEAD FREE, SOIC-8	0.150 INCH, LEAD FREE, SOIC-8	0.150 INCH, LEAD FREE, SOIC-8	0.150 INCH, LEAD FREE, SOIC-8	0.150 INCH, LEAD FREE, SOIC-8	0.150 INCH, LEAD FREE, SOIC-8	-
Lead-free	Yes	Yes	Yes	Yes	Yes	Yes	Yes	Yes	-
EU RoHS regulations	Yes	Yes	Yes	Yes	Yes	Yes	Yes	Yes	-
state	ACTIVE	ACTIVE	ACTIVE	ACTIVE	ACTIVE	ACTIVE	ACTIVE	ACTIVE	-
Craftsmanship	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	-
packaging shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	-
Package Size	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	-
surface mount	Yes	Yes	Yes	Yes	Yes	Yes	Yes	Yes	-
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	-
Terminal spacing	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm	-
terminal coating	MATTE TIN	MATTE TIN	MATTE TIN	MATTE TIN	MATTE TIN	MATTE TIN	MATTE TIN	MATTE TIN	-
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	-
Packaging Materials	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	-
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	-
series	2305	2305	2305	2305	2305	2305	2305	2305	-
Output characteristics	3-ST	3-ST	3-ST	3-ST	3-ST	3-ST	3-ST	3-ST	-
Enter conditions	STANDARD	STANDARD	STANDARD	STANDARD	STANDARD	STANDARD	STANDARD	STANDARD	-
Logic IC type	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	-
Number of inverted outputs	0.0	0.0	0.0	0.0	0.0	0.0	0.0	0.0	-
Real output number	4	4	4	4	4	4	4	4	-
Maximum same-side bending	0.2500 ns	0.2500 ns	0.2500 ns	0.2500 ns	0.2500 ns	0.2500 ns	0.2500 ns	0.2500 ns	-
Max-Min frequency	133 MHz	133 MHz	133 MHz	133 MHz	133 MHz	133 MHz	133 MHz	133 MHz	-

Recommended Resources

Practical sensitive light-controlled switch circuit diagram

CW6140 lathe electrical schematic and wiring diagram circuit

Simple charger circuit diagram

Semiconductor component withstand voltage test circuit

Clever use of KD-28 as voice-activated switch circuit diagram

Single key switch circuit

Working conditions and working characteristics of switching power supply: Working conditions of switching power supply: 　　1. Switch: Power electronic devices work in a switching state rather than a linear state 　　2. High frequency: Power electronic devices operate at high f...; 唯小样 Power technology

Let’s discuss some common misunderstandings about GaN.: I recently saw an article by Qorvo introducing several major misunderstandings about GaN, which made me feel deeply moved.First of all, the issue that everyone considers is the cost. In the engineerin...; alan000345 RF/Wirelessly

RISC-V MCU Development (IV): Compilation Configuration: In embedded development, after we have completed the project creation, code editing and other operations, we can start the project compilation. For projects created using built-in project templates or...; Moiiiiilter MCU

【CH579M-R1】+ driving LCD5110 display: After a day of debugging, the LCD5110 display finally drove successfully. The program was ported from STM32, and a logic analyzer was used to adjust the timing. During the debugging process, I made a ...; hujj Domestic Chip Exchange

Import 3D footprints into PCB library: Import 3D footprints into PCB libraryWhen we do PCB wiring, we sometimes ignore structural problems, as shown in the following figureIn the picture above, you can't see the specific structure at all.T...; tangdianzi PCB Design

What technology does 5G network use? Why is 5G network faster than 4G network?: In fact, it is not "5G is better than 4G", but "in order to be faster than 4G, the concept of 5G network was proposed". In fact, every generation of wireless communication network after 3G first propo...; 兰博 RF/Wirelessly

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components