AL4CA01
AL4CA02
AL4CA03
AL4CA04
AL4CA05
Data Sheets
Version 1.2
AL4CA01/AL4CA02/AL4CA03/AL4CA04/AL4CA05
Amendments
07-30-01
10-25-01
01-03-02
02-20-03
Preliminary Version 1.0
Version 1.1, Added DC and AC timing data
Version 1.2, change speed grade to 12ns and change US office address in back page
Company Contact Information updated
AL4CA01/AL4CA02/AL4CA03/AL4CA04/AL4CA05
February 20, 2003
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AL4CA01/AL4CA02/AL4CA03/AL4CA04/AL4CA05
AL4CA01/AL4CA02/AL4CA03/AL4CA04/AL
4CA05 (512 x9, 1k x9, 2k x9, 4k x9, 8k x9)
Asynchronous FIFO
Contents:
1.0 Description _________________________________________________________________ 4
2.0 Features____________________________________________________________________ 4
3.0 Applications_________________________________________________________________ 4
4.0 Chip Information ____________________________________________________________ 5
4.1 Marking Information______________________________________________________________ 5
4.1 Ordering Information _____________________________________________________________ 5
5.0 Pin-out Diagram _____________________________________________________________ 5
6.0 Block Diagram ______________________________________________________________ 6
7.0 Pin Definition and Description _________________________________________________ 7
8.0 Memory Operations __________________________________________________________ 8
8.1 Inputs and Outputs _______________________________________________________________ 8
8.2 Controls _________________________________________________________________________ 8
8.3 Flags
___________________________________________________________________________ 9
9.0 Multiple Devices Bus Expansion and Cascading __________________________________ 10
9.1 Width Expansion Configuration____________________________________________________ 10
9.2 Depth Expansion ________________________________________________________________ 11
10.0 Electrical Characteristics ____________________________________________________ 13
10.1 Absolute Maximum Ratings ______________________________________________________ 13
10.2 Recommended Operating Conditions ______________________________________________ 13
10.3 DC Characteristics ______________________________________________________________ 13
10.4 AC Electrical Characteristics _____________________________________________________ 13
10.5 Timing Diagrams _______________________________________________________________ 16
11.0 Mechanical Drawing _______________________________________________________ 20
11.1 32-pin PLCC Package ___________________________________________________________ 20
AL4CA01/AL4CA02/AL4CA03/AL4CA04/AL4CA05
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AL4CA01/AL4CA02/AL4CA03/AL4CA04/AL4CA05
1.0 Description
The AL4CA01/AL4CA02/AL4CA03/AL4CA04/AL4CA05 series memory products are high-
performance, low-power 9-bit read/write FIFO (First-In-First-Out) memory chips. They are
specially designed to buffer high speed streaming data for a wide range of communication
applications, such as optical disk controllers, Local Area Networks (LANs), SONET (Synchronous
Optical Network).
The reads and writes are sequential access by using of ring pointers, with no address lines required
to write and read data. Data is toggled in and out of the devices through the use of the Write (/W)
and Read (/R) ins. The devices have a maximum data access time as fast as 25ns.
The devices utilize a 9-bit wide data array to allow for control and parity bits at the user’s option.
This feature is especially useful in data communications applications where it is necessary to use a
party bit for transmission/reception error checking. They also feature a Retransmit (/RT) capability
that allows for reset of the read pointer to its initial position when /RT is pulsed LOW to allow for
retransmission from the beginning of data. A Half-Full Flag is available in the single device mode
and width expansion modes.
The AL4CA01/02/03/04/05 are designed and fabricated using state of the art technology.
2.0 Features
•
•
•
•
•
•
•
•
512 x9-bit cell array (AL4CA01)
1,024 x9-bit cell array (AL4CA02)
2,048 x9-bit cell array (AL4CA03)
4,096 x9-bit cell array (AL4CA04)
8,192 x9-bit cell array (AL4CA05)
12 ns read/write cycle time
Asynchronous data access
Independent Read and Write operations
•
•
•
•
Auto-retransmit support
Empty, Full and Half-Full flags
support
3.3V power supply with 5V tolerant
Available in a 32-pin PLCC
3.0 Applications
•
•
•
•
•
Routers
ATM switches
Cable modems
Wireless base stations
SONET(Synchronous Optical Network) multiplexers
AL4CA01/AL4CA02/AL4CA03/AL4CA04/AL4CA05
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AL4CA01/AL4CA02/AL4CA03/AL4CA04/AL4CA05
4.0 Chip Information
4.1 Marking Information
AL4CA0X
X-XX-XX
Part Number: X = 1, 2, 3, 4, 5 as
AL4CA01, AL4CA02, AL4CA03,
AL4CA04, AL4CA05
Package: XX =
J:
PLCC
PF: TQFP
TF: STQFP
BB: fpBGA
Speed Grade: XX = -12, -15 ..
Version Number: X = A, B, C..
XXXXX
Lot Number
XXXX
Date Code
4.1 Ordering Information
The ordering information for AL4CA01/AL4CA02/AL4CA03/AL4CA04/AL4CA05 are:
Part number
AL4CA01/02/03/04/05 (A-12-J)
Package
32-pin plastic
PLCC
Power Supply
+3.3V±10%
Status
Sample in Aug., 2001
5.0 Pin-out Diagram
The AL4CA01/AL4CA02/AL4CA03/AL4CA04/AL4CA05 pin-out diagram is following:
/FF
NC
Q2
Q1
Q0
D0
D1
6
/XI
D2
5
4
13
12
11
10
9
8
Q3
Q8
GND
NC
/R
Q4
Q5
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
7
D3
D8
/W
NC
VCC
D4
D5
AVERLOGIC
3
2
1
32
31
30
AL4CA0X
x-xx-xx
xxxx
xxxx
/EF
/XO</HF>
/RS
NC
Q6
Q7
D7
/FL</RT>
D6
PLCC PACKAGE TOP VIEW
AL4CA01/AL4CA02/AL4CA03/AL4CA04/AL4CA05
February 20, 2003
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