White Electronic Designs
PCMCIA Flash Memory Card
8MB Through 64 MB (AMD based)
FEATURES
Very High Density Linear Flash Card
Supports 5V only systems
Based on AMD Flash Components
• Low standby power without entering reset mode
• Allows standard access from standby mode
Fast Read Performance
• 150ns Maximum Access Time
x8/ x16 Data Interface
High Performance Random Writes
• 7μs Typical Word Write Time
Automated Write and Erase Algorithms
• AMD Command Set
1,000,000 Erase Cycles per Block
64K word (128kB) symmetrical Block Architecture
PC Card Standard Type I Form Factor
PCMCIA Flash Memory Card
FLE Series
ARCHITECTURE OVERVIEW
WEDC’s FLE series is designed to support up to twenty (see
Block diagram) 32Mb components, providing a wide range
of density options. Cards are based on the Am29F032
(32Mb) device for 5V only applications. The device code
for the Am29F032 is 41h and the manufacturer’s ID is 01h.
Systems should be able to recognize these codes. Cards
utilizing 32Mb components provide densities ranging from
8MB to 64MB in 8MB increments.
In support of the PC Card (PCMCIA) standard for word
wide access, devices are paired. Therefore, the Flash
array is structured in 64K word blocks. Write, read and
block erase operations can be performed as either a
word or byte wide operation . By multiplexing A0, CE1#
and CE2#, 8-bit hosts can access all data on data lines
DQ0 - DQ7. The FLE series cards conform with the PC
Card Standard (formerly PCMCIA) and supported JEIDA,
providing electrical and physical compatibility. The PC
Card form factor offers an industry standard pinout and
mechanical outline, allowing density upgrades without
system design changes.
WEDC’s standard cards are shipped with WEDC’s
silkscreen design. Cards are also available with blank
housings (no silkscreen). The blank housings are available
in both a recessed (for label) and
fl
at housing. Please
contact your WEDC sales representative for further
information on Custom artwork.
GENERAL DESCRIPTION
WEDC’s PCMCIA Flash memory cards offer the highest
density, linear Flash solid state storage solutions for code
and data storage, high performance disk emulation and
execute in place (XIP) applications in mobile PC and
dedicated (embedded) equipment.
Packaged in a PCMCIA type I housing, each card contains
a connector, an array of Flash memories packaged in
TSOP packages and card control logic. The card control
logic provides the system interface and controls the
internal Flash memories. Combined with
fi
le management
software, such as Flash Translation Layer (FTL), WEDC
Flash cards provide removable high-performance disk
emulation.
The WEDC FLE series is based on AMD Flash memories.
The FLE series offers byte wide and word wide operation,
low power modes and Card Information Structure (CIS)
for easy identification of card characteristics.
Note: Standard options include attribute memory. Cards without attribute memory are
available. Cards are also available with or without a hardware write protect switch.
August 2000
Rev. 4
1
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
PCMCIA Flash Memory Card
FLE Series
CARD SIGNAL DESCRIPTION
Symbol
A0 - A25
DQ0 - DQ15
CE1#, CE2#
OE#
WE#
RDY/BSY#
Type
INPUT
INPUT/OUTPUT
INPUT
INPUT
INPUT
OUTPUT
Name and Function
ADDRESS INPUTS:
A0 through A25 enable direct addressing of up to 64MB of memory on the card. Signal A0 is not
used in word access mode. A25 is the most significant bit
DATA INPUT/OUTPUT:
DQ0 THROUGH DQ15 constitute the bi-directional databus. DQ15 is the MSB.
CARD ENABLE 1 AND 2:
CE1# enables even byte accesses, CE2# enables odd byte accesses. Multiplexing A0,
CE1# and CE2# allows 8-bit hosts to access all data on DQ0 - DQ7.
OUTPUT ENABLE:
Active low signal gating read data from the memory card.
WRITE ENABLE:
Active low signal gating write data to the memory card.
READY/BUSY OUTPUT:
Indicates status of internally timed erase or program algorithms. A high output indicates that
the card is ready to accept accesses. A low output indicates that one or more devices in the memory card are busy
with internally timed erase or write activities.
CARD DETECT 1 and 2:
Provide card insertion detection. These signals are connected to ground internally on the
memory card. The host socket interface circuitry shall supply 10K-ohm or larger pull-up resistors on these signal pins.
WRITE PROTECT:
Write protect reflects the status of the Write Protect switch on the memory card. WP set to high
= write protected, providing internal hardware write lockout to the Flash array. If card does not include optional write
protect switch, this signal will be pulled low internally indicating write protect = “off”.
PROGRAM/ERASE POWER SUPPLY:
Not connected for 5V only card.
CARD POWER SUPPLY:
5.0V for all internal circuitry.
GROUND:
for all internal circuitry.
INPUT
INPUT
OUTPUT
OUTPUT
OUTPUT
ATTRIBUTE MEMORY SELECT:
provides access to Flash memory card registers and Card Information Structure in
the Attribute Memory Plane.
RESET:
Active high signal for placing card in Power-on default state. Reset can be used as a Power-Down signal for
the memory array.
WAIT:
This signal is pulled high internally for compatibility. No wait states are generated.
BATTERY VOLTAGE DETECT:
These signals are pulled high to maintain SRAM card compatibility.
VOLTAGE SENSE:
Notifies the host socket of the card’s VCC requirements. VS1 and VS2 are open to indicate a 5V
card has been inserted.
RESERVED FOR FUTURE USE
NO INTERNAL CONNECTION TO CARD:
pin may be driven or left
fl
oating
CD1#, CD2#
WP
OUTPUT
OUTPUT
VPP1, VPP2
VCC
GND
REG#
RST
WAIT#
BVD1, BVD2
VS1, VS2
RFU
N.C.
N.C.
August 2000
Rev. 4
5
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
DSP and ARM Processors
京公网安备 11010802033920号
EEWORLD
