P4C147-15LSM datasheet, PDF - EEWORLD Datasheet

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P4C147-15LSM: DescriptionULTRA HIGH SPEED 4K x 1 STATIC CMOS RAM; Categorystorage storage; File Size188KB，10 Pages; ManufacturerPyramid Semiconductor Corporation; Websitehttp://www.pyramidsemiconductor.com/

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P4C147-15LSM Overview

ULTRA HIGH SPEED 4K x 1 STATIC CMOS RAM

P4C147-15LSM Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Pyramid Semiconductor Corporation
Parts packaging code	LCC
package instruction	QCCN,
Contacts	18
Reach Compliance Code	compli
ECCN code	3A001.A.2.C
Is Samacsys	N
Maximum access time	15 ns
JESD-30 code	R-CQCC-N18
JESD-609 code	e0
length	9.017 mm
memory density	4096 bi
Memory IC Type	STANDARD SRAM
memory width	1
Number of functions	1
Number of terminals	18
word count	4096 words
character code	4000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	4KX1
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	QCCN
Package shape	RECTANGULAR
Package form	CHIP CARRIER
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
Maximum seat height	1.905 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal surface	TIN LEAD
Terminal form	NO LEAD
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.4295 mm
Base Number Matches	1

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P4C147

ULTRA HIGH SPEED 4K x 1

STATIC CMOS RAM

FEATURES

Full CMOS, 6T Cell

High Speed (Equal Access and Cycle Times)

– 10/12/15/20/25 ns (Commercial)

– 15/20/25/35 ns (Military)

Low Power Operation

– 715 mW Active

–10 (Commercial)

– 550 mW Active

–25 (Commercial)

– 110 mW Standby (TTL Input)

– 55 mW Standby (CMOS Input)

Single 5V ± 10% Power Supply

Separate Input and Output Ports

Three-State Outputs

Fully TTL Compatible Inputs and Outputs

Standard Pinout (JEDEC Approved)

– 18 Pin 300 mil DIP

– 18 Pin CERPACK

– 18 Pin LCC (290 x 430 mils)

– 18 Pin LCC (295 x 335 mils)

DESCRIPTION

The P4C147 is a 4,096-bit ultra high speed static RAM

organized as 4K x 1. The CMOS memory requires no

clocks or refreshing, and have equal access and cycle

times. Inputs are fully TTL-compatible. The RAM operates

from a single 5V ± 10% tolerance power supply.

Access times as fast as 10 nanoseconds are available,

permitting greatly enhanced system operating speeds.

CMOS is utilized to reduce power consumption in both

active and standby modes. In addition to very high

performance, this device features latch-up protection

and single-event-upset protection.

The P4C147 is available in 18 pin 300 mil DIP packages,

an 18-pin CERPACK package, and 2 different LCC

packages.

FUNCTIONAL BLOCK DIAGRAM

PIN CONFIGURATIONS

DIP (P1, D1, C9),

CERPACK (F1) SIMILAR

LCC (L7, L7-1)

Document #

SRAM103

REV A

Revised October 2005

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