74HC573D,652 datasheet, PDF - EEWORLD Datasheet

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74HC573D,652: DescriptionLATCH OCT D LATCH INV 3ST; Categorylogic logic; File Size796KB，20 Pages; ManufacturerNexperia; Websitehttps://www.nexperia.com; Environmental Compliance

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74HC573D,652 Overview

LATCH OCT D LATCH INV 3ST

74HC573D,652 Parametric

Parameter Name	Attribute value
Brand Name	Nexperia
Is it Rohs certified?	conform to
Maker	Nexperia
Parts packaging code	SOP
package instruction	SOP-20
Contacts	20
Manufacturer packaging code	SOT163-1
Reach Compliance Code	compliant
Factory Lead Time	4 weeks
Samacsys Description	74HC573D,652, Octal D Type Latch Transparent 3 State 2 to 6V 20-Pin SOIC
Other features	BROADSIDE VERSION OF 373
series	HC/UH
JESD-30 code	R-PDSO-G20
JESD-609 code	e4
length	12.8 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	BUS DRIVER
Humidity sensitivity level	1
Number of digits	8
Number of functions	1
Number of ports	2
Number of terminals	20
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260
propagation delay (tpd)	225 ns
Certification status	Not Qualified
Maximum seat height	2.65 mm
Maximum supply voltage (Vsup)	6 V
Minimum supply voltage (Vsup)	2 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	7.5 mm
Base Number Matches	1

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74HC573; 74HCT573

Octal D-type transparent latch; 3-state

Rev. 7 — 4 March 2016

Product data sheet

1. General description

The 74HC573; 74HCT573 is an 8-bit D-type transparent latch with 3-state outputs. The

device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data

at the inputs enter the latches. In this condition the latches are transparent, a latch output

will change each time its corresponding D-input changes. When LE is LOW the latches

store the information that was present at the inputs a set-up time preceding the

HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a

high-impedance OFF-state. Operation of the OE input does not affect the state of the

latches. Inputs include clamp diodes. This enables the use of current limiting resistors to

interface inputs to voltages in excess of V

2. Features and benefits



Input levels:



For 74HC573: CMOS level



For 74HCT573: TTL level



Inputs and outputs on opposite sides of package allowing easy interface with

microprocessors



Useful as input or output port for microprocessors and microcomputers



3-state non-inverting outputs for bus-oriented applications



Common 3-state output enable input



Multiple package options



Complies with JEDEC standard no. 7 A



ESD protection:



HBM JESD22-A114F exceeds 2 000 V



MM JESD22-A115-A exceeds 200 V



Specified from

40 C

to +85

C

and from

40 C

to +125

C

74HC573D,652 Related Products

	74HC573D,652	74HC573PW,112	74HC573N,652
Description	LATCH OCT D LATCH INV 3ST	LATCH OCTAL TRANS LATCH INV 3-S	LATCH OCT D LATCH INV 3ST
Maker	Nexperia	Nexperia	Nexperia
length	12.8 mm	6.5 mm	26.92 mm
Maximum operating temperature	125 °C	125 °C	+ 125 C
Minimum operating temperature	-40 °C	-40 °C	- 40 C
width	7.5 mm	4.4 mm	6.4 mm
Brand Name	Nexperia	Nexperia	-
Is it Rohs certified?	conform to	conform to	-
Parts packaging code	SOP	TSSOP2	-
package instruction	SOP-20	TSSOP,	-
Contacts	20	20	-
Manufacturer packaging code	SOT163-1	SOT360-1	-
Reach Compliance Code	compliant	compliant	-
Factory Lead Time	4 weeks	4 weeks	-
Samacsys Description	74HC573D,652, Octal D Type Latch Transparent 3 State 2 to 6V 20-Pin SOIC	74HC(T)573 - Octal D-type transparent latch; 3-state@en-us	-
Other features	BROADSIDE VERSION OF 373	BROADSIDE VERSION OF 373	-
series	HC/UH	HC/UH	-
JESD-30 code	R-PDSO-G20	R-PDSO-G20	-
JESD-609 code	e4	e4	-
Load capacitance (CL)	50 pF	50 pF	-
Logic integrated circuit type	BUS DRIVER	BUS DRIVER	-
Humidity sensitivity level	1	1	-
Number of digits	8	8	-
Number of functions	1	1	-
Number of ports	2	2	-
Number of terminals	20	20	-
Output characteristics	3-STATE	3-STATE	-
Output polarity	TRUE	TRUE	-
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	-
encapsulated code	SOP	TSSOP	-
Package shape	RECTANGULAR	RECTANGULAR	-
Package form	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	-
Peak Reflow Temperature (Celsius)	260	260	-
propagation delay (tpd)	225 ns	225 ns	-
Certification status	Not Qualified	Not Qualified	-
Maximum seat height	2.65 mm	1.1 mm	-
Maximum supply voltage (Vsup)	6 V	6 V	-
Minimum supply voltage (Vsup)	2 V	2 V	-
Nominal supply voltage (Vsup)	5 V	5 V	-
surface mount	YES	YES	-
technology	CMOS	CMOS	-
Temperature level	AUTOMOTIVE	AUTOMOTIVE	-
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	-
Terminal form	GULL WING	GULL WING	-
Terminal pitch	1.27 mm	0.65 mm	-
Terminal location	DUAL	DUAL	-
Maximum time at peak reflow temperature	30	30	-
Base Number Matches	1	1	-

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Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

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