EEWORLDEEWORLDEEWORLD

Part Number

Search

ZL30236GGG2

Description
IC CLK GEN 2CH UNIV 100LBGA
Categorysemiconductor    Analog mixed-signal IC   
File Size187KB,2 Pages
ManufacturerMicrosemi
Websitehttps://www.microsemi.com
Environmental Compliance
Download Datasheet Parametric Compare View All

ZL30236GGG2 Online Shopping

Suppliers Part Number Price MOQ In stock  
ZL30236GGG2 - - View Buy Now

ZL30236GGG2 Overview

IC CLK GEN 2CH UNIV 100LBGA

ZL30236GGG2 Parametric

Parameter NameAttribute value
PLLnone
The main purposeEthernet, Fiber Channel, Storage, PCI Express (PCIe)
enterclock, crystal
outputLVCMOS,LVPECL
Number of circuits1
Ratio - Input:Output1:11
Differential - Input:OutputNo/Yes
Frequency - maximum750MHz
Voltage - Power-
Operating temperature-40°C ~ 85°C
Installation typesurface mount
Package/casing100-LBGA
Supplier device packaging100-LBGA(11x11)
Clock Generator Selector Guide
Universal clock generators simplify traditional board designs by synthesizing frequencies from either a reference input clock or a common low-cost crystal, providing
low-jitter output clocks. When used together with Microsemi clock distribution fanout buffers, the clock generators provide customers with improved board performance
and complete timing solutions.
Any-Rate Clock Synthesis Devices
Product
ZL30236
ZL30237
ZL30230
MAX24405
MAX24505
MAX24410
MAX24510
ZL30250
ZL30251
ZL30244
ZL30245
ZL30260
ZL30261
ZL30262
ZL30263
ZL30264
ZL30265
ZL30266
ZL30267
Abbreviation Key:
Independent
Output Freq.
Families
2
2
4
2
2
2
2
1
1
2
2
2
2
2
2
4
4
4
4
Inputs
1 XTAL
1 XTAL
1 XTAL
1 XTAL/SE, 3 D/SE
1 XTAL/SE, 3 D/SE
1 XTAL/SE, 3 D/SE
1 XTAL/SE, 3 D/SE
1 XTAL/SE, 3 D/SE
1 XTAL/SE, 3 D/SE
2 XTAL/SE, 6 D/SE
2 XTAL/SE, 6 D/SE
1 XTAL/SE, 3D/SE
1 XTAL/SE, 3 D/SE
1 XTAL/SE, 3 D/SE
1 XTAL/SE, 3 D/SE
1 XTAL/SE, 3 D/SE
1 XTAL/SE, 3 D/SE
1 XTAL/SE, 3 D/SE
1 XTALl/SE, 3 D/SE
Crystal Input
Freq. Range
20 M, 24.576 M
20 M, 24.576 M
20 M, 24.576 M
25 M–52 M
25 M–52 M
25 M–52 M
25 M–52 M
25 M–60 M
25 M–60 M
25 M–60 M
25 M–60 M
25 M–60 M
25 M–60 M
25 M–60 M
25 M–60 M
25 M–60 M
25 M–60 M
25 M–60 M
25 M–60 M
9.72 M–160 M
9.72 M–160 M
9.72 M–160 M
9.72 M–160 M
9.72 M–300 M
9.72 M–300 M
9.72 M–300 M
9.72 M–300 M
9.72 M–300 M
9.72 M–300 M
9.72 M–300 M
9.72 M–300 M
9.72 M–300 M
9.72 M–300 M
9.72 M–300 M
9.72 M–300 M
9.72 M–750 M
9.72 M–750 M
9.72 M–750 M
9.72 M–750 M
9.72 M–1250 M
9.72 M–1250 M
9.72 M–1250 M
9.72 M–1250 M
9.72 M–1250 M
9.72 M–1250 M
9.72 M–1250 M
9.72 M–1250 M
9.72 M–1250 M
9.72 M–1250 M
9.72 M–1250 M
9.72 M–1250 M
Xtal Oscillator
or CMOS Input
Freq. Range
Diff Input
Freq. Range
Low- Typical
Jitter
Jitter
APLLs fs RMS
2
2
2
2
2
2
2
1
1
2
2
1
1
1
1
2
2
2
2
700
700
700
180
1
180
1
180
1
180
1
160
1
160
1
160
1
160
1
170
1
170
1
170
1
170
1
170
1
170
1
170
1
170
1
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.24
NCO
Mode
NCO
ppb
Diff
CMOS
Outputs Outputs
8
8
4–12
0–5
0–5
0–10
0–10
0–3
0–3
0–6
0–6
0–6
0–6
0–10
0–10
0–6
0–6
0–10
0–10
4
4
4–12
0–10
0–10
0–20
0–20
0–6
0–6
0–12
0–12
0–12
0–12
0–20
0–20
0–12
0–12
0–20
0–20
Output Freq.
Range
1 k–750 M
1 k–750 M
1 k–750 M
<1 Hz–750 M
<1 Hz–750 M
<1 Hz–750 M
<1 Hz–750 M
<1 Hz–1035 M
2
<1 Hz–1035 M
2
<1 Hz–1035 M
2
<1 Hz–1035 M
2
1 Hz–1035 M
2
1 Hz–1035 M
2
1 Hz–1035 M
2
1 Hz–1035 M
2
1 Hz–1035 M
2
1 Hz–1035 M
2
1 Hz–1035 M
2
1 Hz–1035 M
2
NV
Memory
OTP
OTP
OTP
Ext EE
Int EE
Ext EE
Int EE
Ext EE
3
Int EE
3
Ext EE
3
Int EE
3
Ext EE
4
Int EE
4
Ext EE
4
Int EE
4
Ext EE
4
Int EE
4
Ext EE
4
Int EE
4
Host
Bus
SPI/I2C
SPI/I2C
SPI/I2C
SPI
SPI
SPI
SPI
SPI/I2C
SPI/I2C
SPI/I2C
SPI/I2C
SPI/I2C
SPI/I2C
SPI/I2C
SPI/I2C
SPI/I2C
SPI/I2C
SPI/I2C
SPI/I2C
Supply
Voltage
3.3 + 1.8
3.3 + 1.8
3.3 + 1.8
3.3 + 1.8
3.3 + 1.8
3.3 + 1.8
3.3 + 1.8
3.3 + 1.8
3.3 + 1.8
3.3 + 1.8
3.3 + 1.8
Note
5
Note
5
Note
5
Note
5
Note
5
Note
5
Note
5
Note
5
Pkg
Size,
mm
11 × 11
11 × 11
11 × 11
10 × 10
10 × 10
10 × 10
10 × 10
5×5
5×5
5 × 10
5 × 10
8×8
8×8
8×8
8×8
8×8
8×8
8×8
8×8
D = differential
Int EE = internal EEPROM
3 = up to four configurations (pin-selectable)
SE = single-ended (CMOS)
OTP = one-time programmable
4 = up to eight configurations (pin-selectable)
NCO = numerically controlled oscillator
Ext EE = external EEPROM
1 = integer-mode APLL-only operation
2 = spread spectrum-capable
5 = 2.5 V only, 3.3 V only, 1.8 V + 2.5 V, 1.8 V + 3.3 V

ZL30236GGG2 Related Products

ZL30236GGG2 ZL30240LDG1 ZL30241LDF1 ZL30241LDG1 ZL30240LDF1 MAX3671ETN+ MAX3673ETN+ ZL30159GGG2 MAX3678UTN+T
Description IC CLK GEN 2CH UNIV 100LBGA IC CLK GEN NCO UNIV 2CH 48QFN IC CLK GEN NCO UNIV 1CH 48QFN IC CLK GEN NCO UNIV 1CH 48QFN IC CLK GEN NCO UNIV 2CH 48QFN IC SYNTHESIZER FREQ 56-TQFN IC SYNTHESIZER FREQ 56-TQFN IC CLK RATE CONVERTER 64FBGA IC FREQ SYNTH 56-TQFN
PLL none yes yes yes yes - - yes -
The main purpose Ethernet, Fiber Channel, Storage, PCI Express (PCIe) Ethernet, PCI Express (PCIe) Ethernet, PCI Express (PCIe) Ethernet, PCI Express (PCIe) Ethernet, PCI Express (PCIe) - - - -
enter clock, crystal clock, crystal clock, crystal clock, crystal clock, crystal - - LVCMOS,LVPECL -
output LVCMOS,LVPECL HCSL,LVCMOS,LVDS,LVPECL HCSL,LVCMOS,LVDS,LVPECL HCSL,LVCMOS,LVDS,LVPECL HCSL,LVCMOS,LVDS,LVPECL - - LVCMOS -
Number of circuits 1 1 1 1 1 - - 1 -
Ratio - Input:Output 1:11 2:5 2:3 2:3 2:5 - - 1:2 -
Differential - Input:Output No/Yes Yes Yes Yes Yes Yes Yes Yes Yes - - yes/no -
Frequency - maximum 750MHz 914MHz 914MHz 914MHz 914MHz - - 177.5MHz -
Operating temperature -40°C ~ 85°C -40°C ~ 85°C -40°C ~ 85°C -40°C ~ 85°C -40°C ~ 85°C - - -40°C ~ 85°C -
Installation type surface mount surface mount surface mount surface mount surface mount - - surface mount -
Package/casing 100-LBGA 48-VFQFN Exposed Pad 48-VFQFN Exposed Pad 48-VFQFN Exposed Pad 48-VFQFN Exposed Pad - - 64-BGA -
Supplier device packaging 100-LBGA(11x11) 48-QFN(7x7) 48-QFN(7x7) 48-QFN(7x7) 48-QFN(7x7) - - 64-LBGA(9x9) -
The role of negative pressure in LCD screens
In daily work, we occasionally encounter customer feedback: the LCD screen does not display or displays very light after it is turned on. The impact of voltage on this problem is often ignored by us. ...
罗姆液晶技术站 Integrated technical exchanges
Phase-Shift Control of TMS320F280049 - Library Function Implementation
Principle IntroductionThe PWM module of F280049C is powerful and can easily realize phase shift control. This section mainly tells you how to use DSP programming to realize phase shift control. The fo...
Aguilera Microcontroller MCU
5 points to note when using PCB reverse technology
In the study of PCB reverse technology, reverse deduction schematic refers to the reversal of PCB file diagram or drawing PCB circuit diagram directly according to the physical object of the product, ...
中信华 PCB Design
Block diagram of a generic superheterodyne receiver.
[i=s]This post was last edited by btty038 on 2021-6-26 09:13[/i]The design of the frequency plan is directly dependent on the receiver topology, the number of downconversions, and the mode of operatio...
btty038 RF/Wirelessly
【Contactless facial recognition access control system】+ 7-maix_bit facial recognition
maix_bit uses MaixPy for programming, which is from Micropython. So programming is very simple. In my application, I need to use the face recognition function. MaixPy provides routines for face recogn...
manhuami2007 DigiKey Technology Zone
[Synopsys IP Resources] Using ARC VPX DSP IP to achieve high-performance sensor fusion on an embedded budget
Key Trends Driving the Need for Sensor Fusion Smart mobile devices, autonomous driving, smart home devices, industrial control, and robotics are just a few applications of sensor fusion.Sensor fusion ...
arui1999 Integrated technical exchanges

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号