EEWORLDEEWORLDEEWORLD

Part Number

Search

534HF622M080BGR

Description
VOLTAGE-CONTROLLED CRYSTAL OSCILLATOR (VCXO) 10 MHZ TO 1.4 GHZ
File Size191KB,12 Pages
ManufacturerSILABS
Websitehttp://www.silabs.com
Download Datasheet View All

534HF622M080BGR Overview

VOLTAGE-CONTROLLED CRYSTAL OSCILLATOR (VCXO) 10 MHZ TO 1.4 GHZ

Si550
P
R E L I M I N A R Y
D
A TA
S
H E E T
V
O L TA G E
- C
O N T R O L L E D
C
R Y S TA L
O
S C I L L A T O R
(V CX O)
10 MH
Z T O
1.4 G H
Z
Features
Available with any-rate output
frequencies from 10 MHz to
945 MHz and selected frequencies
to 1.4 GHz
3rd generation DSPLL
®
with
superior jitter performance
3x better frequency stability than
SAW based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, & CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Lead-free/RoHS-compliant
Si5602
Ordering Information:
See page 8.
Applications
SONET / SDH
xDSL
10 GbE LAN / WAN
Low-jitter clock generation
Optical modules
Clock and data recovery
Pin Assignments:
See page 7.
(Top View)
V
C
1
2
3
6
5
4
V
DD
Description
The Si550 VCXO utilizes Silicon Laboratories’ advanced DSPLL
®
circuitry to
provide a low-jitter clock at high frequencies. The Si550 is available with
any-rate output frequency from 10 to 945 MHz and selected frequencies to
1400 MHz. Unlike traditional VCXO’s where a different crystal is required for
each output frequency, the Si550 uses one fixed crystal to provide a wide
range of output frequencies. This IC based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In
addition, DSPLL clock synthesis provides superior supply noise rejection,
simplifying the task of generating low-jitter clocks in noisy environments
typically found in communication systems. The Si550 IC-based VCXO is
factory configurable for a wide variety of user specifications, including
frequency, supply voltage, output format, tuning slope, and temperature
stability. Specific configurations are factory programmed at time of shipment,
thereby eliminating long lead times associated with custom oscillators.
OE
GND
CLK–
CLK+
Functional Block Diagram
V
DD
CLK–
CLK+
Fixed
Frequency
XO
Any-rate
10-1400 MHz
DSPLL
®
Clock Synthesis
ADC
Vc
OE
GND
Preliminary Rev. 0.3 4/06
Copyright © 2006 by Silicon Laboratories
Si550
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
[Live broadcast at 8:00 tonight] A domestic chip praised by old forum friends, watch the 800MHz RISC-V high-performance MCU of Xianji play with four motors
Recently, the domestic chip (Click here to view the review ) that the old forum friends liked , Xianji 800MHz RISC-V MCU——HPM6750 theme live broadcast The show will start at 8pm tonight . We have invi...
EEWORLD社区 Domestic Chip Exchange
Introduction to common interfaces of smart TV
At present, analog signal interfaces dominate, while digital signal interfaces are rare. Nowadays, LCD TVs are becoming more and more popular, so digital signals have become the mainstream. Among them...
fish001 Analogue and Mixed Signal
Single chip digital stopwatch program
I made a stopwatch program for students to refer to. We have covered all the knowledge points involved in the program, including timers, digital tubes, interrupts, buttons, and other knowledge points....
Aguilera Microcontroller MCU
EEWORLD University - Understanding and Optimizing Sampling Data Systems
Understanding and Optimizing Sampled Data Systems : https://training.eeworld.com.cn/course/4769Analog-to-digital (or digital-to-analog) data conversion is an important component in many forms of elect...
电子生涯 Analog electronics
Did you feel disappointed after watching Avengers 4?
Although 40 Oceans was produced by someone else, I don’t think it’s that good. For example, Captain Marvel, I don’t know what the ending is, which makes me feel inexplicable....
EricGo Talking
Focus on IC design base model innovation
Focus on IC design base model innovationSource: Author: Added date: 2005-10-21 11:56:00 Hits: 16  After more than four years of operation, the seven national-level integrated circuit design industrial...
cfi FPGA/CPLD

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号